Budget Amount *help |
¥4,290,000 (Direct Cost: ¥3,300,000、Indirect Cost: ¥990,000)
Fiscal Year 2010: ¥1,170,000 (Direct Cost: ¥900,000、Indirect Cost: ¥270,000)
Fiscal Year 2009: ¥3,120,000 (Direct Cost: ¥2,400,000、Indirect Cost: ¥720,000)
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Research Abstract |
In production of VLSI, manufacturing testing is essential to detect faults. This work targets Chiba scan testing, a class of delay fault testing. This work provided two methods reducing test data volume and test application time for Chiba scan testing to reduce testing cost. One method reduces idling time of scan output. The other reorders scan FF.
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