| Project/Area Number |
22226009
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| Research Category |
Grant-in-Aid for Scientific Research (S)
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| Allocation Type | Single-year Grants |
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| Research Field |
Electron device/Electronic equipment
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| Research Institution | Yokohama National University |
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Principal Investigator |
YOSHIKAWA Nobuyuki 横浜国立大学, 工学(系)研究科(研究院), 教授 (70202398)
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| Co-Investigator(Kenkyū-buntansha) |
FUJIMAKI Akira 名古屋大学, 大学院工学研究科, 教授 (20183931)
HIDAKA Mutsuo 独立行政法人産業技術総合研究所, ナノエレクトロニクス研究部門, 上級主任研究員 (20500672)
MAEZAWA Masaaki 独立行政法人産業技術総合研究所, エレクトロニクス研究部門, 研究グループ長 (40357976)
SUZUKI Hideo (財)国際超電導産業技術研究センター, 超電導工学研究所, 主管研究員 (40607230)
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| Research Collaborator |
DOROJEVETS Mikhail Stony Brook大学, Department of Electricals and Computer Engineering, Professor
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| Project Period (FY) |
2010-05-31 – 2015-03-31
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| Project Status |
Completed (Fiscal Year 2014)
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| Budget Amount *help |
¥212,290,000 (Direct Cost: ¥163,300,000、Indirect Cost: ¥48,990,000)
Fiscal Year 2014: ¥27,170,000 (Direct Cost: ¥20,900,000、Indirect Cost: ¥6,270,000)
Fiscal Year 2013: ¥39,520,000 (Direct Cost: ¥30,400,000、Indirect Cost: ¥9,120,000)
Fiscal Year 2012: ¥47,970,000 (Direct Cost: ¥36,900,000、Indirect Cost: ¥11,070,000)
Fiscal Year 2011: ¥43,680,000 (Direct Cost: ¥33,600,000、Indirect Cost: ¥10,080,000)
Fiscal Year 2010: ¥53,950,000 (Direct Cost: ¥41,500,000、Indirect Cost: ¥12,450,000)
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| Keywords | 超伝導デバイス / 低消費電力 / 断熱論理回路 / QFP / SFQ / ジョセフソン素子 / 超伝導集積回路 / 単一磁束量子回路 / 超伝導材料・素子 / 先端機能デバイス / 超高速情報処理 / デバイス設計・製造プロセス / 超伝導回路 / 集積回路 |
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| Outline of Final Research Achievements |
Single-flux-quantum (SFQ) circuits, which utilize quantized flux in a superconducting loop as logical bit information, can operate at very high speed with extremely low power consumption. The purpose of this project is to verify the utmost limit of low power operations of SFQ circuits. We bring in new principles and technologies to reduce the power consumption of the SFQ circuits, which include new operation principles of SFQ logic gates, such as adiabatic SFQ circuits, new circuit architectures and new process technologies. We could reduce the power consumption of the SFQ circuits to 1/1000 of current SFQ circuits based on newly developed technoloties. We have established the fundamental technologies for sub-μW microprocessors, which are truly-unexplored regions in the digital electronics world.
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| Assessment Rating |
Verification Result (Rating)
A-
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Assessment Rating |
Result (Rating)
A: Progress in the research is steadily towards the initial goal. Expected research results are expected.
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