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Innovative Low Loss Semiconductor Rectifier with Pulsed Carrier Injection Mechanism

Research Project

Project/Area Number 22360118
Research Category

Grant-in-Aid for Scientific Research (B)

Allocation TypeSingle-year Grants
Section一般
Research Field Power engineering/Power conversion/Electric machinery
Research InstitutionKyushu Institute of Technology

Principal Investigator

OMURA Ichiro  九州工業大学, 工学研究院, 教授 (10510670)

Project Period (FY) 2010 – 2012
Project Status Completed (Fiscal Year 2012)
Budget Amount *help
¥18,720,000 (Direct Cost: ¥14,400,000、Indirect Cost: ¥4,320,000)
Fiscal Year 2012: ¥2,990,000 (Direct Cost: ¥2,300,000、Indirect Cost: ¥690,000)
Fiscal Year 2011: ¥7,410,000 (Direct Cost: ¥5,700,000、Indirect Cost: ¥1,710,000)
Fiscal Year 2010: ¥8,320,000 (Direct Cost: ¥6,400,000、Indirect Cost: ¥1,920,000)
Keywordsパワーエレクトロニクス / パワー半導体 / 電力用ダイオード / 電子デバイス・機器 / 省エネルギー / 二酸化炭素排出削減
Research Abstract

The possibility of silicon power device loss reduction by 50% is demonstrated in theory and experiment. In the research, PiN diodes, which have been used in variety of applications, are particularly considered for loss reduction with new carrier injection method. The new method with pulsed injection shows reduction of forward voltage drop down to 0.4V which is about a half of the conventional PiN diodes. In the research IGBT loss reduction method is also demonstrated.

Report

(4 results)
  • 2012 Annual Research Report   Final Research Report ( PDF )
  • 2011 Annual Research Report
  • 2010 Annual Research Report
  • Research Products

    (30 results)

All 2013 2012 2011 2010 Other

All Journal Article (3 results) (of which Peer Reviewed: 3 results) Presentation (15 results) (of which Invited: 1 results) Remarks (2 results) Patent(Industrial Property Rights) (10 results) (of which Overseas: 4 results)

  • [Journal Article] Role of Simulation Technology for the Progress in Power Devices and Their Applications2013

    • Author(s)
      Hiromichi Ohashi, Ichiro Omura
    • Journal Title

      IEEE TRANSACTION ON ELECTRON DEVICES

      Volume: Vol.60, No.2 Issue: 2 Pages: 528-536

    • DOI

      10.1109/ted.2012.2228272

    • NAID

      120005841742

    • URL

      http://dx.doi.org/

    • Related Report
      2012 Annual Research Report 2012 Final Research Report
    • Peer Reviewed
  • [Journal Article] IGBT Scaling Principle Toward CMOS Compatible Wafer Processes2012

    • Author(s)
      Masahiro Tanaka, Ichiro Omura
    • Journal Title

      Solid-State Electronics

      Volume: vol.80 Pages: 118-123

    • DOI

      10.1016/j.sse.2012.10.020

    • NAID

      120005841745

    • URL

      http://dx.doi.org/

    • Related Report
      2012 Annual Research Report 2012 Final Research Report
    • Peer Reviewed
  • [Journal Article] Structure Oriented Compact Model for Advanced Trench IGBTs without Fitting Parameters for Extreme Condition: part I2011

    • Author(s)
      Masahiro Tanaka, Ichiro Omura
    • Journal Title

      Microelectronics Reliability

      Volume: vol.51 Issue: 9-11 Pages: 1933-1937

    • DOI

      10.1016/j.microrel.2011.07.050

    • URL

      http://dx.doi.org/

    • Related Report
      2012 Final Research Report 2011 Annual Research Report
    • Peer Reviewed
  • [Presentation] 高耐圧パワーデバイス用スケールダウン・テストヘッドの開発2013

    • Author(s)
      松吉峻、附田正則(ICSEAD)、平井秀敏、大村一郎
    • Organizer
      電子情報通信学会 IEICE Technical Report EE2012-46
    • Place of Presentation
      熊本
    • Year and Date
      2013-01-24
    • Related Report
      2012 Final Research Report
  • [Presentation] 「高耐圧パワーデバイス用スケールダウン・テストヘッドの開発」2013

    • Author(s)
      松吉峻、附田正則(ICSEAD)、平井秀敏、大村一郎
    • Organizer
      電子情報通信学会
    • Place of Presentation
      熊本、日本
    • Related Report
      2012 Annual Research Report
  • [Presentation] Semiconductor Power Switches: Principles and the Future2012

    • Author(s)
      Ichiro Omura
    • Organizer
      Proc. Of ISPSD
    • Place of Presentation
      Bruges, Belgium
    • Related Report
      2012 Final Research Report
  • [Presentation] Scaling Rule for Very Shallow Trench IGBT toward CMOS Process Compatibility2012

    • Author(s)
      Masahiro Tanaka and Ichiro Omura
    • Organizer
      Proc. Of ISPSD
    • Place of Presentation
      Bruges, Belgium
    • Related Report
      2012 Final Research Report
  • [Presentation] Universal Trench Edge Termination Design2012

    • Author(s)
      Kota Seto, Ryu Kamibaba, Masanori Tsukuda and Ichiro Omura
    • Organizer
      Proc. Of ISPSD
    • Place of Presentation
      Bruges, Belgium
    • Related Report
      2012 Final Research Report
  • [Presentation] Scattering Parameter Approach to Power MOSFET Design for EMI2012

    • Author(s)
      Masanori Tsukuda, Keiichiro Kawakami and Ichiro Omura
    • Organizer
      Proc. Of ISPSD
    • Place of Presentation
      Bruges, Belgium
    • Related Report
      2012 Final Research Report
  • [Presentation] Lateral Power Devices: from LDMOS, LIGBT to GaN2012

    • Author(s)
      Ichiro Omura
    • Organizer
      2012 International Symposium on VLSI Technology
    • Place of Presentation
      Hsinchu, Taiwan
    • Related Report
      2012 Final Research Report
  • [Presentation] “Scaling Rule for Very Shallow Trench IGBT toward CMOS Process Compatibility”2012

    • Author(s)
      Masahiro Tanaka, Ichiro Omura
    • Organizer
      The 24th International Symposium on Power Semiconductor Devices & IC's (ISPSD’12)
    • Place of Presentation
      Bruges, Belgium
    • Related Report
      2012 Annual Research Report
  • [Presentation] “Universal Trench Edge Termination Design”2012

    • Author(s)
      Kota Seto, Ryu Kamibaba, Masanori Tsukuda, Ichiro Omura
    • Organizer
      The 24th International Symposium on Power Semiconductor Devices & IC's (ISPSD’12)
    • Place of Presentation
      Bruges, Belgium
    • Related Report
      2012 Annual Research Report
  • [Presentation] “Scattering Parameter Approach to Power MOSFET Design for EMI”2012

    • Author(s)
      Masanori Tsukuda, Keiichiro Kawakami, Ichiro Omura
    • Organizer
      The 24th International Symposium on Power Semiconductor Devices & IC's (ISPSD’12)
    • Place of Presentation
      Bruges, Belgium
    • Related Report
      2012 Annual Research Report
  • [Presentation] “Lateral Power Devices: from LDMOS, LIGBT to GaN”2012

    • Author(s)
      Ichiro Omura
    • Organizer
      2012 International Symposium on VLSI Technology, Systems and Applications VLSI Design, Automation and Test
    • Place of Presentation
      Hsinchu, Taiwan
    • Related Report
      2012 Annual Research Report
    • Invited
  • [Presentation] Ultra Low Loss Trench Gate PCI-PiN Diode with VF<350mV2011

    • Author(s)
      Motohiro Tsuda, Yasuaki Matsumoto, Ichiro Omura
    • Organizer
      he 23rd International Symposium on Power Semiconductor Devices & IC's (ISPSD'11)
    • Place of Presentation
      San Diego, USA
    • Related Report
      2012 Final Research Report
  • [Presentation] Ultra Low Loss Trench Gate PCI-PiN Diode with V_F<350mV2011

    • Author(s)
      Motohiro Tsuda, Yasuaki Matsumoto, Ichiro Omura
    • Organizer
      The 23rd International Symposium on Power Semicon ductor Devices & IC's
    • Place of Presentation
      San Diego, USA
    • Related Report
      2011 Annual Research Report
  • [Presentation] Challenge to the Barrier of Conduction Loss in PiN Diode toward VF<300 mV with Pulsed Carrier Injection Concept2010

    • Author(s)
      Yasuaki Matumoto, Kenichi Takahama, Ichiro Omura
    • Organizer
      The 22nd International Symposium on Power Semiconductor Devices and ICs (ISPSD'10)
    • Place of Presentation
      Hiroshima, Japan
    • Related Report
      2012 Final Research Report
  • [Presentation] Challenge to the Barrier of Conduction Loss in PiN Diode toward VF<300 mV with Pulsed Carrier Injection Concept2010

    • Author(s)
      Yasuaki Matumoto, Kenichi Takahama, Ichiro Omura
    • Organizer
      The 22^<nd> International Symposium on Power Semiconductor Devices and ICs (ISPSD'10)
    • Place of Presentation
      Hiroshima, Japan
    • Related Report
      2010 Annual Research Report
  • [Remarks] 日経エレクトロニクス 2013.2.18, pp.16-17

    • Related Report
      2012 Final Research Report
  • [Remarks] 半導体産業新聞(平成24年8月8日)研究開発・新技術インタビュー

    • Related Report
      2012 Final Research Report
  • [Patent(Industrial Property Rights)] 高電圧絶縁ゲート型電力用半導体装置およびその製造方法2012

    • Inventor(s)
      大村一郎、田中雅浩、附田正則、三木大和
    • Industrial Property Rights Holder
      九州工業大学
    • Industrial Property Number
      2012-195347
    • Filing Date
      2012-09-05
    • Related Report
      2012 Final Research Report
  • [Patent(Industrial Property Rights)] 高電圧電力用半導体装置2012

    • Inventor(s)
      大村一郎、瀬戸康太、附田正則
    • Industrial Property Rights Holder
      九州工業大学
    • Industrial Property Number
      2012-123461
    • Filing Date
      2012-05-30
    • Related Report
      2012 Annual Research Report 2012 Final Research Report
  • [Patent(Industrial Property Rights)] 高電圧絶縁ゲート型電力用半導体装置2012

    • Inventor(s)
      大村一郎、田中雅浩、三木大和
    • Industrial Property Rights Holder
      九州工業大学
    • Industrial Property Number
      2012-123462
    • Filing Date
      2012-05-30
    • Related Report
      2012 Annual Research Report 2012 Final Research Report
  • [Patent(Industrial Property Rights)] 半導体装置及び駆動方法2012

    • Inventor(s)
      大村一郎、松本泰明、津田基裕、附田正則
    • Industrial Property Rights Holder
      九州工業大学
    • Filing Date
      2012-05-17
    • Related Report
      2012 Final Research Report
    • Overseas
  • [Patent(Industrial Property Rights)] 半導体装置及び駆動方法2012

    • Inventor(s)
      大村一郎、松本泰明、津田基裕、附田正則
    • Industrial Property Rights Holder
      九州工業大学
    • Filing Date
      2012-05-14
    • Related Report
      2012 Final Research Report
    • Overseas
  • [Patent(Industrial Property Rights)] 高電圧絶縁ゲート型電力用半導体装置2012

    • Inventor(s)
      大村一郎、田中雅浩、附田正則、
    • Industrial Property Rights Holder
      九州工業大学
    • Industrial Property Rights Type
      特許
    • Industrial Property Number
      2012-195347
    • Filing Date
      2012-09-05
    • Related Report
      2012 Annual Research Report
  • [Patent(Industrial Property Rights)] 半導体装置及び駆動方法2012

    • Inventor(s)
      大村一郎、松本泰明、津田基裕、
    • Industrial Property Rights Holder
      九州工業大学
    • Industrial Property Rights Type
      特許
    • Filing Date
      2012-05-17
    • Related Report
      2012 Annual Research Report
    • Overseas
  • [Patent(Industrial Property Rights)] 半導体装置及び駆動方法2012

    • Inventor(s)
      大村一郎、松本泰明、津田基裕、
    • Industrial Property Rights Holder
      九州工業大学
    • Industrial Property Rights Type
      特許
    • Filing Date
      2012-05-14
    • Related Report
      2012 Annual Research Report
    • Overseas
  • [Patent(Industrial Property Rights)] 半導体装置及び駆動方法2011

    • Inventor(s)
      大村一郎、松本泰明、津田基裕、附田正則
    • Industrial Property Rights Holder
      九州工業大学
    • Patent Publication Number
      2012-243918
    • Filing Date
      2011-05-18
    • Related Report
      2012 Final Research Report
  • [Patent(Industrial Property Rights)] 半導体装置及び駆動方法2011

    • Inventor(s)
      大村一郎, 松本泰明, 津田基裕, 附田正則
    • Industrial Property Rights Holder
      国立大学法人九州工業大学
    • Industrial Property Number
      2011-111883
    • Filing Date
      2011-05-18
    • Related Report
      2011 Annual Research Report

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Published: 2010-08-23   Modified: 2019-07-29  

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