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Nonvolatile-device-based PVT-variation-resilient VLSI system

Research Project

Project/Area Number 22360137
Research Category

Grant-in-Aid for Scientific Research (B)

Allocation TypeSingle-year Grants
Section一般
Research Field Electron device/Electronic equipment
Research InstitutionTohoku University

Principal Investigator

HANYU TAKAHIRO  東北大学, 電気通信研究所, 教授 (40192702)

Co-Investigator(Kenkyū-buntansha) NATSUI Masanori  東北大学, 電気通信研究所, 助教 (10402661)
Project Period (FY) 2010-04-01 – 2014-03-31
Project Status Completed (Fiscal Year 2013)
Budget Amount *help
¥18,200,000 (Direct Cost: ¥14,000,000、Indirect Cost: ¥4,200,000)
Fiscal Year 2013: ¥3,120,000 (Direct Cost: ¥2,400,000、Indirect Cost: ¥720,000)
Fiscal Year 2012: ¥6,240,000 (Direct Cost: ¥4,800,000、Indirect Cost: ¥1,440,000)
Fiscal Year 2011: ¥5,330,000 (Direct Cost: ¥4,100,000、Indirect Cost: ¥1,230,000)
Fiscal Year 2010: ¥3,510,000 (Direct Cost: ¥2,700,000、Indirect Cost: ¥810,000)
Keywords回路設計技術 / 集積回路 / バラつき補正技術 / 新機能デバイス / 最適化技術
Research Abstract

The aim of this research is to develop a new paradigm VLSI design methodology which relaxes design margin and realizes high-performance VLSI with high-dependability. In this research, we developed a MOS/magnetic-tunnel-junction-hybrid logic-circuit style for realizing a PVT-variation-aware VLSI processor with higher performance capability. For applying the proposed method to large-scale circuit structures, an optimization algorithm of circuit parameters based on evolutionary computation technique was also examined.

Report

(5 results)
  • 2013 Annual Research Report   Final Research Report ( PDF )
  • 2012 Annual Research Report
  • 2011 Annual Research Report
  • 2010 Annual Research Report
  • Research Products

    (57 results)

All 2013 2012 2011 2010 Other

All Journal Article (17 results) (of which Peer Reviewed: 17 results) Presentation (39 results) Remarks (1 results)

  • [Journal Article] Design of Process-Variation-Resilient Analog Basic Components Using Magnetic-Tunnel-Junction Devices2013

    • Author(s)
      M. Natsui and T. Hanyu
    • Journal Title

      Journal of Multiple-Valued Logic and Soft Computing

      Volume: Vol.21, No.5-6 Pages: 597-608

    • URL

      http://www.oldcitypublishing.com/pdf/3498

    • Related Report
      2013 Annual Research Report 2013 Final Research Report
    • Peer Reviewed
  • [Journal Article] MTJ/MOS-Hybrid Logic-Circuit Design Flow for Nonvolatile Logic-in-Memory LSI2013

    • Author(s)
      M. Natsui, N. Sakimura, T. Sugibayashi, and T. Hanyu
    • Journal Title

      2013 IEEE International Symposium on Circuits and Systems (ISCAS2013)

      Pages: 105-108

    • DOI

      10.1109/iscas.2013.6571793

    • Related Report
      2013 Final Research Report
    • Peer Reviewed
  • [Journal Article] Design and Evaluation of a Differential Switching Gate for Low-Voltage Applications2013

    • Author(s)
      M. Natsui, K. Kashiuchi, and T. Hanyu
    • Journal Title

      43rd IEEE International Symposium on Multiple-Valued Logic (ISMVL2013)

      Pages: 147-151

    • DOI

      10.1109/ismvl.2013.23

    • Related Report
      2013 Final Research Report
    • Peer Reviewed
  • [Journal Article] Design of Process-Variation-Resilient Analog Basic Components Using Magnetic-Tunnel-Junction Devices2013

    • Author(s)
      M. Natsui
    • Journal Title

      Journal of Multiple-Valued Logic and Soft Computing

      Volume: -

    • Related Report
      2012 Annual Research Report
    • Peer Reviewed
  • [Journal Article] Design and Evaluation of a Differential Switching Gate for Low-Voltage Applications2013

    • Author(s)
      M. Natsui
    • Journal Title

      Proceedings of the 43rd IEEE International Symposium on Multiple-Valued Logic

      Volume: -

    • Related Report
      2012 Annual Research Report
    • Peer Reviewed
  • [Journal Article] Low-Energy Pipelined Multiple-Valued Current-Mode Circuit Based on Current-Level Control Technique2012

    • Author(s)
      M. Natsui, T. Arimitsu and T. Hanyu
    • Journal Title

      Journal of Multiple-Valued Logic and Soft Computing

      Volume: Vol.19, No.1-3 Pages: 219-231

    • URL

      http://www.oldcitypublishing.com/pdf/2910

    • Related Report
      2013 Final Research Report 2012 Annual Research Report
    • Peer Reviewed
  • [Journal Article] Scalable Serial-Configuration Scheme for MTJ/MOS-Hybrid Variation-Resilient VLSI System2012

    • Author(s)
      M. Natsui and T. Hanyu
    • Journal Title

      10th IEEE International NEWCAS Conference (NEWCAS2012)

      Pages: 97-100

    • DOI

      10.1109/newcas.2012.6328965

    • Related Report
      2013 Final Research Report
    • Peer Reviewed
  • [Journal Article] Variation-Resilient Current-Mode Logic Circuit Design Using MTJ Devices2012

    • Author(s)
      Y. Kim, M. Natsui and T. Hanyu
    • Journal Title

      2012 IEEE International Symposium on Circuits & Systems (ISCAS2012)

      Pages: 2705-2708

    • DOI

      10.1109/iscas.2012.6271866

    • Related Report
      2013 Final Research Report
    • Peer Reviewed
  • [Journal Article] Process-Variation-Resilient OTA Using MTJ-Based Multi-Level Resistance Control2012

    • Author(s)
      M. Natsui, T. Nagashima, and T. Hanyu
    • Journal Title

      42nd IEEE International Symposium on Multiple-Valued Logic (ISMVL2012)

      Pages: 214-219

    • DOI

      10.1109/ismvl.2012.52

    • Related Report
      2013 Final Research Report
    • Peer Reviewed
  • [Journal Article] Scalable Serial-Configuration Scheme for MTJ/MOS-Hybrid Variation-Resilient VLSI System2012

    • Author(s)
      M. Natsui
    • Journal Title

      Proceedings of the 10th IEEE International NEWCAS Conference

      Volume: - Pages: 97-100

    • Related Report
      2012 Annual Research Report
    • Peer Reviewed
  • [Journal Article] Process-Variation-Resilient OTA Using MTJ-Based Multi-Level Resistance Control2012

    • Author(s)
      M. Natsui
    • Journal Title

      Proceedings of the 42nd IEEE International Symposium on Multiple-Valued Logic

      Volume: - Pages: 214-219

    • Related Report
      2012 Annual Research Report
    • Peer Reviewed
  • [Journal Article] Variation-Resilient Current-Mode Logic Circuit Design Using MTJ Devices2012

    • Author(s)
      Y. Kim
    • Journal Title

      Proceedings of the 2012 IEEE International Symposium on Circuits & Systems

      Volume: - Pages: 2705-2708

    • Related Report
      2012 Annual Research Report
    • Peer Reviewed
  • [Journal Article] Variation-Resilient Current-Mode Logic Circuit Design Using MTJ Devices2012

    • Author(s)
      Y.Kim, M.Natsui, T.Hanyu
    • Journal Title

      Proceedings of 2012 IEEE International Symposium on Circuits & Systems

      Volume: (掲載確定)

    • Related Report
      2011 Annual Research Report
    • Peer Reviewed
  • [Journal Article] Process-Variation-Resilient OTA Using MTJ-Based Multi-Level Resistance Control2012

    • Author(s)
      M.Natsui, T.Nagashima, T.Hanyu
    • Journal Title

      Proceedings of the 42nd IEEE International Symposium on Multiple-Valued Logic

      Volume: (掲載確定)

    • Related Report
      2011 Annual Research Report
    • Peer Reviewed
  • [Journal Article] Low-Energy Pipelined Multiple-Valued Current-Mode Circuit Based on Current-Level Control Technique2012

    • Author(s)
      M.Natsui, T.Arimitsu, T.Hanyu
    • Journal Title

      Journal of Multiple-Valued Logic and Soft Computing

      Volume: (未定)(掲載確定)

    • Related Report
      2010 Annual Research Report
    • Peer Reviewed
  • [Journal Article] MTJ-Based Optimal Vth-Tuning Technique for a Process-Variation-Aware VLSI processor2011

    • Author(s)
      M. Natsui, Y. Kim and T. Hanyu
    • Journal Title

      The 56th Magnetism and Magnetic Materials Conference (MMM2011)

      Pages: 480-481

    • URL

      http://www.magnetism.org/

    • Related Report
      2013 Final Research Report
    • Peer Reviewed
  • [Journal Article] MTJ-Based Optimal Vth-Tuning Technique for a Process-Variation-Aware VLSI processor2011

    • Author(s)
      M.Natsui, Y.Kim, T.Hanyu
    • Journal Title

      Proceedings of the 56th Magnetism and Magnetic Materials Conference

      Pages: 480-481

    • Related Report
      2011 Annual Research Report
    • Peer Reviewed
  • [Presentation] Design of a Low-Voltage Logic Gate Based on Differential-Pair Circuitry2013

    • Author(s)
      K. Kashiuchi, M. Natsui, and T. Hanyu
    • Organizer
      2013 International Workshop on Emerging ICT
    • Place of Presentation
      Sendai, Japan
    • Year and Date
      2013-10-29
    • Related Report
      2013 Annual Research Report 2013 Final Research Report
  • [Presentation] MTJ素子を用いた不揮発ロジックLSIの低電力化に関する一考察2013

    • Author(s)
      夏井雅典, 荒木敦司, 羽生貴弘
    • Organizer
      多値論理研究ノート
    • Place of Presentation
      兵庫
    • Year and Date
      2013-09-14
    • Related Report
      2013 Final Research Report
  • [Presentation] Design and Evaluation of a Differential Switching Gate for Low-Voltage Applications2013

    • Author(s)
      M. Natsui, K. Kashiuchi, and T. Hanyu
    • Organizer
      43rd IEEE International Symposium on Multiple-Valued Logic (ISMVL2013)
    • Place of Presentation
      Toyama, Japan
    • Related Report
      2013 Annual Research Report
  • [Presentation] MTJ/MOS-Hybrid Logic-Circuit Design Flow for Nonvolatile Logic-in-Memory LSI2013

    • Author(s)
      M. Natsui, N. Sakimura, T. Sugibayashi, and T, Hanyu
    • Organizer
      2013 IEEE International Symposium on Circuits and Systems (ISCAS2013)
    • Place of Presentation
      Beijing, China
    • Related Report
      2013 Annual Research Report
  • [Presentation] MTJ 素子を用いた不揮発ロジックLSI の低電力化に関する一考察2013

    • Author(s)
      夏井雅典,荒木敦司,羽生貴弘
    • Organizer
      第36回多値論理フォーラム
    • Place of Presentation
      姫路
    • Related Report
      2013 Annual Research Report
  • [Presentation] 低電圧動作差動論理基本ゲートの構成に関する一考察2012

    • Author(s)
      樫内清弘, 夏井雅典, 羽生貴弘
    • Organizer
      多値論理研究ノート
    • Place of Presentation
      富山
    • Year and Date
      2012-09-15
    • Related Report
      2013 Final Research Report
  • [Presentation] 低スイッチング電力基本論理ゲートの構成に関する一考察2012

    • Author(s)
      樫内清弘, 夏井雅典, 羽生貴弘
    • Organizer
      平成24年度電気関係学会東北支部連合大会
    • Place of Presentation
      秋田
    • Year and Date
      2012-08-30
    • Related Report
      2013 Final Research Report
  • [Presentation] Design of an MTJ-Based Variation-Resilient Basic Gate of Differential Logic2012

    • Author(s)
      Y. Kim, M. Natsui and T. Hanyu
    • Organizer
      平成24年度電気関係学会東北支部連合大会
    • Place of Presentation
      秋田
    • Year and Date
      2012-08-30
    • Related Report
      2013 Final Research Report
  • [Presentation] Fundamental Technologies of High-Performance VLSI Processor for Multimedia Applications2012

    • Author(s)
      T.Hanyu, M.Natsui, A.Matsumoto
    • Organizer
      The 5th International Symposium and The 4th Student-Organizing International Mini-Conference on Information Electronics Systems
    • Place of Presentation
      仙台ウエスティンホテル
    • Year and Date
      2012-02-23
    • Related Report
      2011 Annual Research Report
  • [Presentation] Vth補償機能を有するMOS/MTJハイブリッド電流モードロジックとその最適化2012

    • Author(s)
      キムヨンクン, 夏井雅典, 羽生貴弘
    • Organizer
      第25回多値論理とその応用研究会
    • Place of Presentation
      宮崎
    • Year and Date
      2012-01-08
    • Related Report
      2013 Final Research Report
  • [Presentation] Vth補償機能を有するMOS/MTJハイブリッド電流モードロジックとその最適化2012

    • Author(s)
      キム ヨンクン, 夏井雅典, 羽生貴弘
    • Organizer
      第25回多値論理とその応用研究会
    • Place of Presentation
      宮崎観光ホテル
    • Year and Date
      2012-01-08
    • Related Report
      2011 Annual Research Report
  • [Presentation] 低電圧動作差動論理基本ゲートの構成に関する一考察2012

    • Author(s)
      樫内 清弘
    • Organizer
      多値論理研究ノート
    • Place of Presentation
      富山国際会議場 大手町フォーラム
    • Related Report
      2012 Annual Research Report
  • [Presentation] Design of an MTJ-Based Variation-Resilient Basic Gate of Differential Logic2012

    • Author(s)
      Y. Kim
    • Organizer
      平成24年度電気関係学会東北支部連合大会
    • Place of Presentation
      秋田県立大学本荘キャンパス
    • Related Report
      2012 Annual Research Report
  • [Presentation] 低スイッチング電力基本論理ゲートの構成に関する一考察2012

    • Author(s)
      樫内 清弘
    • Organizer
      平成24年度電気関係学会東北支部連合大会
    • Place of Presentation
      秋田県立大学本荘キャンパス
    • Related Report
      2012 Annual Research Report
  • [Presentation] Evaluation of Vth-Variation Effect on Multiple-Valued Current-Mode Circuits2011

    • Author(s)
      K. Kashiuchi, M. Natsui, and T. Hanyu
    • Organizer
      Proceedings of 2011 China-Korea-Japan Electronics and Communications Conference
    • Place of Presentation
      University of Electronic Science and Technology of China, China
    • Year and Date
      2011-10-27
    • Related Report
      2013 Final Research Report
  • [Presentation] Evaluation of Vth-Variation Effect on Multiple-Valued Current-Mode Circuits2011

    • Author(s)
      K.Kashiuchi, M.Natsui, T.Hanyu
    • Organizer
      2011 China-Korea-Japan Electronics and Communications Conference
    • Place of Presentation
      中国,成都
    • Year and Date
      2011-10-27
    • Related Report
      2011 Annual Research Report
  • [Presentation] 可変抵抗素子を用いたポストプロセスばらつき補償機能付きOTAの検討2011

    • Author(s)
      長嶋孝晃, 夏井雅典, 桝井昇一, 羽生貴弘
    • Organizer
      平成23年度電気関係学会東北支部連合大会
    • Place of Presentation
      宮城
    • Year and Date
      2011-08-26
    • Related Report
      2013 Final Research Report
  • [Presentation] 不揮発性可変抵抗素子を用いたLSIパラメータばらつき最小化アルゴリズムの検討2011

    • Author(s)
      キムヨンクン, 夏井雅典, 羽生貴弘
    • Organizer
      平成23年度電気関係学会東北支部連合大会
    • Place of Presentation
      宮城
    • Year and Date
      2011-08-26
    • Related Report
      2013 Final Research Report
  • [Presentation] 不揮発性可変抵抗素子を用いたLSIパラメータばらつき最小化アルゴリズムの検討2011

    • Author(s)
      キム ヨンクン, 夏井雅典, 羽生貴弘
    • Organizer
      平成23年度電気関係学会東北支部連合大会
    • Place of Presentation
      東北学院大学
    • Year and Date
      2011-08-26
    • Related Report
      2011 Annual Research Report
  • [Presentation] 可変抵抗素子を用いたポストプロセスばらつき補償機能付きOTAの検討2011

    • Author(s)
      長嶋孝晃, 夏井雅典, 桝井昇一, 羽生貴弘
    • Organizer
      平成23年度電気関係学会東北支部連合大会
    • Place of Presentation
      東北学院大学
    • Year and Date
      2011-08-26
    • Related Report
      2011 Annual Research Report
  • [Presentation] 不揮発性ロジックインメモリアーキテクチャに基づく高信頼VLSI設計技術2011

    • Author(s)
      夏井雅典, 羽生貴弘
    • Organizer
      第73回ニューパラダイムコンピューティング研究会
    • Place of Presentation
      会津大学
    • Year and Date
      2011-07-30
    • Related Report
      2011 Annual Research Report
  • [Presentation] 不揮発性ロジックインメモリアーキテクチャが拓く新概念VLSI 設計パラダイム2011

    • Author(s)
      夏井雅典, 羽生貴弘
    • Organizer
      LSI とシステムのワークショップ2011
    • Place of Presentation
      福岡
    • Year and Date
      2011-05-16
    • Related Report
      2013 Final Research Report
  • [Presentation] 不揮発性ロジックインメモリアーキテクチャが拓く新概念VLSI設計パラダイム2011

    • Author(s)
      夏井雅典, 羽生貴弘
    • Organizer
      LSIとシステムのワークショップ2011
    • Place of Presentation
      北九州国際会議場
    • Year and Date
      2011-05-16
    • Related Report
      2011 Annual Research Report
  • [Presentation] 不揮発性ロジックインメモリアーキテクチャが拓く新コンピューティングパラダイムの展望2011

    • Author(s)
      夏井雅典, 羽生貴弘
    • Organizer
      第58回応用物理学関係連合講演会
    • Place of Presentation
      神奈川工科大学
    • Year and Date
      2011-03-24
    • Related Report
      2010 Annual Research Report
  • [Presentation] MTJ素子を用いた完全並列形不揮発TCAMワード回路の構成2011

    • Author(s)
      勝俣翠, 松永翔雲, 夏井雅典, 羽生貴弘
    • Organizer
      第24回多値論理とその応用研究会
    • Place of Presentation
      宮城
    • Year and Date
      2011-01-08
    • Related Report
      2013 Final Research Report
  • [Presentation] MTJ素子を用いた完全並列形不揮発TCAMワード回路の構成2011

    • Author(s)
      勝俣翠, 松永翔雲, 夏井雅典, 羽生貴弘
    • Organizer
      第24回多値論理とその応用研究会
    • Place of Presentation
      東北大学
    • Year and Date
      2011-01-08
    • Related Report
      2010 Annual Research Report
  • [Presentation] High-yield VLSI design using emerging functional devices and its impact2010

    • Author(s)
      M. Natsui
    • Organizer
      2010 Joint Workshop between Tohoku University and National Tsing Hua University
    • Place of Presentation
      Akiu Resort Hotel Sakan, Sendai, Japan
    • Year and Date
      2010-12-15
    • Related Report
      2013 Final Research Report
  • [Presentation] High-yield VLSI design using emerging functional devices and its impact2010

    • Author(s)
      M.Natsui
    • Organizer
      2010 Joint Workshop between Tohoku University and National Tsing Hua University
    • Place of Presentation
      仙台秋保温泉佐勘
    • Year and Date
      2010-12-15
    • Related Report
      2010 Annual Research Report
  • [Presentation] Design of a Dependable Logic Circuit Using Nonvolatile Programmable Devices2010

    • Author(s)
      Y. Kim, M. Natsui and T. Hanyu
    • Organizer
      Japan-China-Korea Conference on Electronics & Communications 2010
    • Place of Presentation
      Tohoku University, Sendai, Japan
    • Year and Date
      2010-11-01
    • Related Report
      2013 Final Research Report
  • [Presentation] MTJ-Based Nonvolatile Reconfigurable LSI with Fine Grained Power Management2010

    • Author(s)
      L. Yuhui, D. Suzuki, M. Natsui and T. Hanyu
    • Organizer
      Japan-China-Korea Conference on Electronics & Communications 2010
    • Place of Presentation
      Tohoku University, Sendai, Japan
    • Year and Date
      2010-11-01
    • Related Report
      2013 Final Research Report
  • [Presentation] MTJ-Based Nonvolatile Reconfigurable LSI with Fine Grained Power Management2010

    • Author(s)
      L.Yuhui, D.Suzuki, M.Natsui, T.Hanyu
    • Organizer
      Japan-China-Korea Conference on Electronics & Communications 2010
    • Place of Presentation
      東北大学
    • Year and Date
      2010-11-01
    • Related Report
      2010 Annual Research Report
  • [Presentation] Design of a Dependable Logic Circuit Using Nonvolatile Programmable Devices2010

    • Author(s)
      Y.Kim, M.Natsui, T.Hanyu
    • Organizer
      Japan-China-Korea Conference on Electronics & Communications 2010
    • Place of Presentation
      東北大学
    • Year and Date
      2010-11-01
    • Related Report
      2010 Annual Research Report
  • [Presentation] MTJ素子を用いた低消費電力不揮発性TCAMのパワーゲーティング手法2010

    • Author(s)
      松永翔雲, 夏井雅典, 羽生貴弘
    • Organizer
      多値論理研究ノート
    • Place of Presentation
      広島
    • Year and Date
      2010-09-11
    • Related Report
      2013 Final Research Report
  • [Presentation] MTJ素子を用いた低消費電力不揮発性TCAMのパワーケーディング手法2010

    • Author(s)
      松永翔雲, 夏井雅典, 羽生貴弘
    • Organizer
      第33回多値論理フォーラム
    • Place of Presentation
      広島市まちづくり市民交流プラザ
    • Year and Date
      2010-09-11
    • Related Report
      2010 Annual Research Report
  • [Presentation] 完全並列形不揮発TCAM向けワード回路の構成2010

    • Author(s)
      勝俣翠, 松永翔雲, 夏井雅典, 羽生貴弘
    • Organizer
      平成22年度電気関係学会東北支部連合大会
    • Place of Presentation
      青森
    • Year and Date
      2010-08-26
    • Related Report
      2013 Final Research Report
  • [Presentation] 完全並列形不揮発TCAM向けワード回路の構成2010

    • Author(s)
      勝俣翠, 松永翔雲, 夏井雅典, 羽生貴弘
    • Organizer
      平成22年度電気関係学会東北支部連合大会
    • Place of Presentation
      八戸工業大学
    • Year and Date
      2010-08-26
    • Related Report
      2010 Annual Research Report
  • [Presentation] Fundamental Technologies towards New Paradigm VLSI Computing2010

    • Author(s)
      T.Hanyu, M.Natsui, A.Matsumoto, S.Matsunaga, N.Onizawa, D.Suzuki
    • Organizer
      The 4th International Symposium on Information Electronics Systems
    • Place of Presentation
      仙台エクセルホテル東急
    • Year and Date
      2010-07-08
    • Related Report
      2010 Annual Research Report
  • [Presentation] Process-Variation-Aware VLSI Design Using an Emerging Functional Devices and Its Impact2010

    • Author(s)
      M. Natsui and T. Hanyu
    • Organizer
      Booklet of the 19th International Workshop on Post-Binary ULSI Systems
    • Place of Presentation
      Casa Convalescencia, Barcelona, Spain
    • Year and Date
      2010-05-28
    • Related Report
      2013 Final Research Report
  • [Presentation] Process-Variation-Aware VLSI Design Using an Emerging Functional Devices and Its Impact2010

    • Author(s)
      M.Natsui, T.Hanyu
    • Organizer
      19th International Workshop on Post-Binary ULSI Systems
    • Place of Presentation
      スペイン,バルセロナ
    • Year and Date
      2010-05-28
    • Related Report
      2010 Annual Research Report
  • [Remarks]

    • URL

      http://www.ngc.riec.tohoku.ac.jp/

    • Related Report
      2013 Final Research Report

URL: 

Published: 2010-08-23   Modified: 2019-07-29  

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