Network architecture and communication of a photonicnetwork-on-chip with fully utilizing inherent parallelism in applications

• Project/Area Number: 22500042
• Research Category: Grant-in-Aid for Scientific Research (C)
• Allocation Type: Single-year Grants
• Section: 一般
• Research Field: Computer system/Network
• Research Institution: The University of Electro-Communications
• Principal Investigator: YOSHINAGA Tsutomu 電気通信大学, 大学院・情報システム学研究科, 教授 (60210738)
• Co-Investigator(Kenkyū-buntansha): 三好 健文 電気通信大学, 大学院・情報システム学研究科, 助教 (70506732)
• Project Period (FY): 2010 – 2012
• Project Status: Completed (Fiscal Year 2012)
• Budget Amount: ¥4,420,000 (Direct Cost: ¥3,400,000、Indirect Cost: ¥1,020,000); Fiscal Year 2012: ¥1,040,000 (Direct Cost: ¥800,000、Indirect Cost: ¥240,000); Fiscal Year 2011: ¥1,170,000 (Direct Cost: ¥900,000、Indirect Cost: ¥270,000); Fiscal Year 2010: ¥2,210,000 (Direct Cost: ¥1,700,000、Indirect Cost: ¥510,000)
• Keywords: ネットワークオンチップ / 光通信 / 光ネットワーク / メニーコアプロセッサ / オンチップルータ / 通信方式 / シリコンフォトニクス / 低消費電力 / 高性能通信 / ネットワークトポロジー / 高スループット通信 / サーキットスイッチング

Research Abstract

We proposed a photonic network-on-chip (NoC) which utilizes both static and dynamic wavelength allocation mechanisms. Proposed NoC communicates fine-grained and coarse-grained messages by the static and dynamic wavelength allocations, respectively. Our experiments show that the proposed NoC improves communication performance per energy consumption compared to previously proposed electronic-photonic hybrid NoCs.

Research Products

• [Journal Article] An Efficient Path Setup for a Hybrid Photonic Network-on-Chip (2011)
  • Author(s): Cisse Ahmadou Dit Adi, Hiroki Matsutani, Michihiro Koibuchi, Hidetsugu Irie, Takefumi Miyoshi, and Tsutomu Yoshinaga
  • Journal Title: International Journal of Networking and Computing Volume: Vol.1, No.2 Pages: 244-259
  • NAID: 120006315523
  • URL: http://www.ijnc.org/index.php/ijnc/article/view/27/25
  • Peer Reviewed
• [Journal Article] An Efficient Path Setup for a Hybrid Photonic Network-on-Chip (2011)
  • Author(s): Cisse Ahmadou Dit ADI, et al.
  • Journal Title: International Journal of Networking and Computing Volume: 1 Pages: 244-259
  • Peer Reviewed
• [Presentation] Hidetsugu Irie and Tsutomu Yoshinaga : Parallel Numerical Simulation of Visual Neurons for Analysis of Optical Illusion (2012)
  • Author(s): Akira Egashira, Shunji Satoh
  • Organizer: Proc. of the 3rd Int. Conf. on Networking and Computing (ICNC'12)
  • Place of Presentation: Okinawa
  • Year and Date: 2012-12-06
• [Presentation] Throttling Control for Bufferless Routing in On-Chip Networks (2012)
  • Author(s): Yicheng Guan, CIsse Ahmadou Dit Adi, Takefumi Miyoshi, Michihiro Koibuchi, Hidetsugu Irie and Tsutomu Yoshinaga
  • Organizer: Proc. of 6th IEEE Int. Sympo. on Embedded Multicore SoCs (MCSoC-12)
  • Place of Presentation: Aizu
  • Year and Date: 2012-09-20
• [Presentation] A Token-based Fully Photonic Network-on-Chip with Dynamic Wavelength Allocation (2012)
  • Author(s): Ping Qiu, Cisse Ahmadou Dit Adi, Hidetsugu Irie, and Tsutomu Yoshinaga
  • Organizer: Proc. of the International Workshop on Modern Science and Technology (IWMST2012)
  • Place of Presentation: Tokyo
  • Year and Date: 2012-08-30
• [Presentation] A Token-based Fully Photonic Network-on-Chip with Dynamic Wavelength Allocation (2012)
  • Author(s): Ping Qiu
  • Organizer: Proc. of the International Workshop on Modern Science and Technology (IWMST 2012)
  • Place of Presentation: Tokyo
• [Presentation] Throttling Control for Bufferless Routing in On-Chip Networks (2012)
  • Author(s): Yicheng Guan
  • Organizer: Proc. of 6th IEEE Int. Sympo. on Embedded Multicore SoCs (MCSoC-12)
  • Place of Presentation: Okinawa
• [Presentation] Parallel Numerical Simulation of Visual Neurons for Analysis of Optical Illusion (2012)
  • Author(s): Akira Egashira
  • Organizer: Proc. of the 3rd International Conference on Networking and Computing (ICNC 2012)
  • Place of Presentation: Okinawa
• [Presentation] An Efficient Path Setup for a Hybrid Photonic Network-on-Chip (2010)
  • Author(s): Cisse Ahmadou Dit ADI
  • Organizer: Proc.of the 2nd Workshop on Ultra Performance and Dependable Acceleration Systems(UPDAS'10)
  • Place of Presentation: 広島大学(広島県)
  • Year and Date: 2010-11-19
• [Presentation] An Efficient Path Setup for a Hybrid Photonic Network-on-Chip (2010)
  • Author(s): Cisse Ahmadou Dit Adi, Hiroki Matsutani, Michihiro Koibuchi, Hidetsugu Irie, Takefumi Miyoshi and Tsutomu Yoshinaga
  • Organizer: Proc. of the 2nd Workshop on Ultra Performance and Dependable Acceleration Systems (UPDAS'10)
  • Place of Presentation: Hiroshima