Network architecture and communication of a photonicnetwork-on-chip with fully utilizing inherent parallelism in applications
Project/Area Number |
22500042
|
Research Category |
Grant-in-Aid for Scientific Research (C)
|
Allocation Type | Single-year Grants |
Section | 一般 |
Research Field |
Computer system/Network
|
Research Institution | The University of Electro-Communications |
Principal Investigator |
YOSHINAGA Tsutomu 電気通信大学, 大学院・情報システム学研究科, 教授 (60210738)
|
Co-Investigator(Kenkyū-buntansha) |
三好 健文 電気通信大学, 大学院・情報システム学研究科, 助教 (70506732)
|
Project Period (FY) |
2010 – 2012
|
Project Status |
Completed (Fiscal Year 2012)
|
Budget Amount *help |
¥4,420,000 (Direct Cost: ¥3,400,000、Indirect Cost: ¥1,020,000)
Fiscal Year 2012: ¥1,040,000 (Direct Cost: ¥800,000、Indirect Cost: ¥240,000)
Fiscal Year 2011: ¥1,170,000 (Direct Cost: ¥900,000、Indirect Cost: ¥270,000)
Fiscal Year 2010: ¥2,210,000 (Direct Cost: ¥1,700,000、Indirect Cost: ¥510,000)
|
Keywords | ネットワークオンチップ / 光通信 / 光ネットワーク / メニーコアプロセッサ / オンチップルータ / 通信方式 / シリコンフォトニクス / 低消費電力 / 高性能通信 / ネットワークトポロジー / 高スループット通信 / サーキットスイッチング |
Research Abstract |
We proposed a photonic network-on-chip (NoC) which utilizes both static and dynamic wavelength allocation mechanisms. Proposed NoC communicates fine-grained and coarse-grained messages by the static and dynamic wavelength allocations, respectively. Our experiments show that the proposed NoC improves communication performance per energy consumption compared to previously proposed electronic-photonic hybrid NoCs.
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Report
(4 results)
Research Products
(10 results)