| Budget Amount *help |
¥4,290,000 (Direct Cost: ¥3,300,000、Indirect Cost: ¥990,000)
Fiscal Year 2012: ¥1,300,000 (Direct Cost: ¥1,000,000、Indirect Cost: ¥300,000)
Fiscal Year 2011: ¥1,690,000 (Direct Cost: ¥1,300,000、Indirect Cost: ¥390,000)
Fiscal Year 2010: ¥1,300,000 (Direct Cost: ¥1,000,000、Indirect Cost: ¥300,000)
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| Research Abstract |
We developed an efficient CA algorithm for single-image super resolution based on low-memory box filtering. In FPGA implementation, we realize real-time QVGA to VGA movie processing and higher-quality jaggy suppression than bi-cubic interpolation. Moreover we implemented a fast 2-D local histogram equalization method, which with compensates halo effects, without kernel-size dependency. Using a2.9-GHz CPU with our method, the algorithm achieves 2 million pixels per 0.4 sec operation without the need for down sampling, Single Instruction/Multiple Data (SIMD) or multi-thread operation.
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