Self-Calibration, Testing, Diagnosis and Repairing Techniques ofNano-CMOS Analog Circuits
| Project/Area Number |
22560319
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| Research Category |
Grant-in-Aid for Scientific Research (C)
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| Allocation Type | Single-year Grants |
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| Section | 一般 |
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| Research Field |
Electron device/Electronic equipment
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| Research Institution | Gunma University |
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Principal Investigator |
KOBAYASHI Haruo 群馬大学, 大学院・工学研究科, 教授 (20292625)
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| Project Period (FY) |
2010 – 2012
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| Project Status |
Completed (Fiscal Year 2012)
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| Budget Amount *help |
¥3,640,000 (Direct Cost: ¥2,800,000、Indirect Cost: ¥840,000)
Fiscal Year 2012: ¥1,430,000 (Direct Cost: ¥1,100,000、Indirect Cost: ¥330,000)
Fiscal Year 2011: ¥1,430,000 (Direct Cost: ¥1,100,000、Indirect Cost: ¥330,000)
Fiscal Year 2010: ¥780,000 (Direct Cost: ¥600,000、Indirect Cost: ¥180,000)
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| Keywords | 集積回路 / ナノCMOS / アナログ / 自己校正 / LSI テスト / LSIテスト |
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| Research Abstract |
Several techniques for self-calibration, testing, diagnosis and repairing have been developed and verified for analog/mixed-signal integrated circuits (such as pipelined ADC, cyclic ADC, SAR ADC, interleaved ADC, Time-to-Digital converter circuits) with nano-CMOS technology.
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Report
(4 results)
Research Products
(66 results)
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[Presentation] Multi-bit Sigma-Delta TDC Architecture with Self-Calibration2012
Author(s)
S. Uemori, M. Ishii, H. Kobayashi, Y. Doi, Os. Kobayashi, T. Matsuura, K. Niitsu, Y. Arakawa, D. Hirabayashi, Y. Yano, T. Gake, N. Takai, T. Yamaguchi
Organizer
IEEE Asia Pacific Conference on Circuits and Systems
Place of Presentation
Kaohsiung, Taiwan
Year and Date
2012-12-05
Related Report
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[Presentation] Multi-bit Sigma-Delta TDC Architecture for Digital Signal Timing Measurement2012
Author(s)
S. Uemori, M. Ishii, H. Kobayashi, Y. Doi, O. Kobayashi, T. Matsuura, K. Niitsu, F. Abe, D. Hirabayashi
Organizer
IEEE International Mixed-Signals, Sensors, and Systems Test Workshop
Place of Presentation
Taipei, Taiwan
Year and Date
2012-05-15
Related Report
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[Presentation] TVチューナ用完全ディジタルPLL回路-システムの観点から2011
Author(s)
湯本哲也, 村上健, 西村繁幸, 田邊朋之, 壇徹, 高橋伸夫, 内藤智洋, 北村真一, 坂田浩司, 小林春夫, 高井伸和, 新津葵一
Organizer
電気学会 電子回路研究会
Place of Presentation
長崎
Year and Date
2011-10-20
Related Report
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[Presentation] TVチューナ用完全ディジタルPLL回路-広帯域化の検討2011
Author(s)
村上健, 湯本哲也, 長谷川賀則, 三田大介, 壇徹, 内藤智洋, 高橋伸夫, 坂田浩司, 北村真一, 小林春夫, 高井伸和, 新津葵一
Organizer
電気学会 電子回路研究会
Place of Presentation
長崎
Year and Date
2011-10-20
Related Report
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[Presentation] Low-Distortion Single-Tone and Two-Tone Sinewave Generation Using ΣΔ DAC2011
Author(s)
T.Yamada, O.Kobayashi, K.Kato, K.Wakabayashi, H.Kobayashi, T.Matsuura, Y.Yano, T.Gake, K.Niitsu, N.Takai, T.Yamaguchi
Organizer
IEEE International Test Conference
Place of Presentation
Anaheim, CA, USA
Year and Date
2011-09-21
Related Report
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[Presentation] Low-Distortion Single-Tone and Two-Tone Sinewave Generation Algorithms Using an Arbitrary Waveform Generator2011
Author(s)
K. Wakabayashi, T. Yamada, S. Uemori, O. Kobayashi, K. Kato, H. Kobayashi, K. Niitsu, H. Miyashita, S. Kishigami, K. Rikino, Y. Yano, T. Gake
Organizer
IEEE International Mixed-Signals, Sensors, and Systems Test Workshop
Place of Presentation
Santa Barbara, CA
Year and Date
2011-05-16
Related Report
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[Presentation] Low-Distortion Single-Tone and Two-Tone Sinewave Generation Algorithms Using an Arbitrary Waveform Generator2011
Author(s)
K.Wakabayashi, T.Yamada, S.Uemori, O.Kobayashi, K.Kato, H.Kobayashi, K.Nitsu, H.Miyashita, S.Kishigami, K.Rikino, Y.Yano, T.Gake
Organizer
IEEE International Mixed-Signals, Sensors, and Systems Test Workshop
Place of Presentation
Santa Barbara, CA, USA
Year and Date
2011-05-16
Related Report
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