A study on real-time image recognition SOC with affine motion segmentation
| Project/Area Number |
22560325
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| Research Category |
Grant-in-Aid for Scientific Research (C)
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| Allocation Type | Single-year Grants |
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| Section | 一般 |
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| Research Field |
Electron device/Electronic equipment
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| Research Institution | Kanazawa University |
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Principal Investigator |
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| Project Period (FY) |
2010-04-01 – 2013-03-31
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| Project Status |
Completed (Fiscal Year 2013)
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| Budget Amount *help |
¥4,420,000 (Direct Cost: ¥3,400,000、Indirect Cost: ¥1,020,000)
Fiscal Year 2012: ¥2,860,000 (Direct Cost: ¥2,200,000、Indirect Cost: ¥660,000)
Fiscal Year 2011: ¥910,000 (Direct Cost: ¥700,000、Indirect Cost: ¥210,000)
Fiscal Year 2010: ¥650,000 (Direct Cost: ¥500,000、Indirect Cost: ¥150,000)
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| Keywords | 画像分割 / パターン認識 / 画像認識 / SOC |
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| Research Abstract |
This study proposes a novel image recognition algorithm for general purpose with high accuracy. We also develop an SOC based on this algorithm with real-time performance. The SOC consists of a general purpose CPU and a processor dedicated to affine motion segmentation. The processor divides an image into regions corresponding to objects captured in stereo images. The processor calculates gradient image moment to estimate a parallax between regions of an identical object in the left and right images. The CPU classifies objects with SVM (Support Vector Machine). The SVM uses the image gradient moment again as an image feature for recognition. Then the motion segmentation processor tracks objects with affine motion model estimation using an image of the next time. Image recogniton by the SOC is applicable to many applications such as vehicle detection and tracking. The chip area of the SOC is 4.1 mm square. The operating frequency is 94 MHz. The processing throughput is VGA 91 fps.
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Report
(4 results)
Research Products
(28 results)
