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Research on Data Resident Computing

Research Project

Project/Area Number 22650008
Research Category

Grant-in-Aid for Challenging Exploratory Research

Allocation TypeSingle-year Grants
Research Field Computer system/Network
Research InstitutionThe University of Tokyo

Principal Investigator

NAKAMURA Hiroshi  東京大学, 大学院・情報理工学系研究科, 教授 (20212102)

Project Period (FY) 2010 – 2012
Project Status Completed (Fiscal Year 2012)
Budget Amount *help
¥3,440,000 (Direct Cost: ¥2,900,000、Indirect Cost: ¥540,000)
Fiscal Year 2012: ¥780,000 (Direct Cost: ¥600,000、Indirect Cost: ¥180,000)
Fiscal Year 2011: ¥1,560,000 (Direct Cost: ¥1,200,000、Indirect Cost: ¥360,000)
Fiscal Year 2010: ¥1,100,000 (Direct Cost: ¥1,100,000)
Keywordsコンピューティング / 実行モデル / アーキテクチャ / 高性能化 / 低消費電力化
Research Abstract

Currently, inefficiency of data transfers between computing components prevents computer systems from further performance improvement or power reduction, rather than computing components themselves. To overcome this problem, this research proposes a new computing paradigm called Data Resident Computing, which can directly optimize data transfers. This paradigm is applied to many-core processors, and two new computing methods are proposed. One is data compression by making use of locative information of paths of data transfers, and the other is novel process scheduling by considering the interferences between data transfers of different cores. Experimental results reveal the effectiveness of the proposed techniques.

Report

(4 results)
  • 2012 Annual Research Report   Final Research Report ( PDF )
  • 2011 Annual Research Report
  • 2010 Annual Research Report
  • Research Products

    (6 results)

All 2012 2010

All Journal Article (3 results) (of which Peer Reviewed: 1 results) Presentation (3 results)

  • [Journal Article] Adaptive DataCompression on 3D Network-on-Chips2012

    • Author(s)
      Yuan He, Hiroki Matsutani, Hiroshi Sasaki,and Hiroshi Nakamura
    • Journal Title

      IPSJ Transactions on Computing Systems,

      Volume: Vol.5 No.1 Pages: 80-87

    • NAID

      130002073538

    • Related Report
      2012 Final Research Report
  • [Journal Article] Adaptive Data Compression on 3D Network-on-Chips2012

    • Author(s)
      Y.He, H.Matsutani, H.Sasaki, H.Nakamura
    • Journal Title

      IPSJ Transactions on Computing Systems

      Volume: Vol.5 No.1 Pages: 80-87

    • NAID

      130002073538

    • Related Report
      2011 Annual Research Report
    • Peer Reviewed
  • [Journal Article] パケット転送経路の偏りに着目した高性能非同期式ネットワークオンチップの検討2010

    • Author(s)
      武安聡、今井雅、中村宏
    • Journal Title

      電子情報通信学会技術研究報告

      Volume: VLD2010-66 Pages: 66-72

    • NAID

      110008152348

    • Related Report
      2010 Annual Research Report
  • [Presentation] Scalability-Based ManycorePartitioning2012

    • Author(s)
      Hiroshi Sasaki, Teruo Tanimito, Koji Inoue, andHiroshi Nakamura
    • Organizer
      IEEE International Conference onParallel Architecture and CompilationTechnology
    • Place of Presentation
      Minneapolis,USA
    • Related Report
      2012 Final Research Report
  • [Presentation] Scalability-Based Manycore Partitioning2012

    • Author(s)
      Hiroshi SASAKI
    • Organizer
      IEEE International Conference on Parallel Architecture and Compilation Technology
    • Place of Presentation
      Minneapolis, USA
    • Related Report
      2012 Annual Research Report
  • [Presentation] パケット転送経路の偏りに着目した高性能非同期式ネットワークオンチップの検討2010

    • Author(s)
      武安聡,今井雅,中村宏
    • Organizer
      電子情報通信学会技術研究報告
    • Related Report
      2012 Final Research Report

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Published: 2010-08-23   Modified: 2019-07-29  

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