| Budget Amount *help |
¥3,900,000 (Direct Cost: ¥3,000,000、Indirect Cost: ¥900,000)
Fiscal Year 2012: ¥1,040,000 (Direct Cost: ¥800,000、Indirect Cost: ¥240,000)
Fiscal Year 2011: ¥1,690,000 (Direct Cost: ¥1,300,000、Indirect Cost: ¥390,000)
Fiscal Year 2010: ¥1,170,000 (Direct Cost: ¥900,000、Indirect Cost: ¥270,000)
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| Research Abstract |
We have proposed CoreSymphony architecture that is one of the cooperative core architectures. In this research project, we design and implement efficient and realistic CoreSymphony and run it on FPGA. The research project makes the following main contributions: (1) Proposing e cient and realistic CoreSymphony, the cooperative core architecture that forbids most of communication from front-end, adopts an out-of-order core as a baseline, and does not need binary modification. (2) Clarifying the problems on microarchitecture in order to realize CoreSymphony. (3) Designing and implementing CoreSymphony to solve these problems. (4) Showing possibility of the CoreSymphony architecture.
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