Development of a Fast Signal/Power Integrity Analysis Simulator for 3-Dimensional Integrated Circuits with Processing in Memory (PIM)
| Project/Area Number |
22K14241
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| Research Category |
Grant-in-Aid for Early-Career Scientists
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| Allocation Type | Multi-year Fund |
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| Review Section |
Basic Section 21010:Power engineering-related
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| Research Institution | Nara Institute of Science and Technology |
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Principal Investigator |
Kim YoungWoo 奈良先端科学技術大学院大学, 先端科学技術研究科, 助教 (30862403)
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| Project Period (FY) |
2022-04-01 – 2023-03-31
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| Project Status |
Discontinued (Fiscal Year 2022)
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| Budget Amount *help |
¥4,680,000 (Direct Cost: ¥3,600,000、Indirect Cost: ¥1,080,000)
Fiscal Year 2023: ¥2,340,000 (Direct Cost: ¥1,800,000、Indirect Cost: ¥540,000)
Fiscal Year 2022: ¥2,340,000 (Direct Cost: ¥1,800,000、Indirect Cost: ¥540,000)
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| Keywords | signal/power integrity / Packaging / EMI/EMI / Hardware Security / simulator development / 3-D IC / PIM |
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| Outline of Research at the Start |
Circuit schematic development for the 3-D IC with PIM is conducted considering the PDN structures and TSV in the interposer. The schematic is converted into analytical models. Statistical approach is incorporated into the analytical model. Finally, GUI is provided so that it can be practically used.
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| Outline of Annual Research Achievements |
Under this project, the PI was able to conduct a novel research and publish various journals and conferences (all reviewed).Using this budget, the PI developed a novel statistical/analytical simulator for an advanced packages with a new architecture (PIM). The proposed simulator/analyzer allows an accurate SI/PI/EMI/EMC/HWS analysis.
Using the simulator, noise suppression structures and high-speed channels are designed in the interposer supporting the PIM-HBM. Also, low-loss substrate is adopted in the package. Under this condition, the design and analysis must be conducted once again. The proposed simulator provides a promising solution under this case since it enables an ultra-fast SI/PI analysis. The result is presented at the international conference as an invited paper. This result is also highlighted in the IEEE advanced packaging society. This new method is also delivered at IC design education center (IDEC Korea)'s package design and analysis lecture as well. Also, the design/simulation method is expanded to other electrical system/package/interconnection analysis. The result is presented at DesignCon which is a top industry-oriented conference held in Silicon valley and won the best paper award.
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Report
(1 results)
Research Products
(6 results)
