Project/Area Number |
22K14260
|
Research Category |
Grant-in-Aid for Early-Career Scientists
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Allocation Type | Multi-year Fund |
Review Section |
Basic Section 21020:Communication and network engineering-related
|
Research Institution | Kyushu University |
Principal Investigator |
BARAKAT ADEL 九州大学, システム情報科学研究院, 助教 (20792039)
|
Project Period (FY) |
2022-04-01 – 2025-03-31
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Project Status |
Granted (Fiscal Year 2023)
|
Budget Amount *help |
¥4,420,000 (Direct Cost: ¥3,400,000、Indirect Cost: ¥1,020,000)
Fiscal Year 2024: ¥780,000 (Direct Cost: ¥600,000、Indirect Cost: ¥180,000)
Fiscal Year 2023: ¥1,950,000 (Direct Cost: ¥1,500,000、Indirect Cost: ¥450,000)
Fiscal Year 2022: ¥1,690,000 (Direct Cost: ¥1,300,000、Indirect Cost: ¥390,000)
|
Keywords | Metamateria / wireless power transfer / wireless data transfer / Clock and data recovery / Efficiency / low power consumption / Metamaterial / Efficienct oscillator / wireless power and data / biocompatibility / biomedical implant / stacked metamaterial / free running oscillator |
Outline of Research at the Start |
A general wireless power and data transfer (WPDT) system employs two modules, which results in a large size. Also, the use of a fixed frequency oscillator makes the performance of the WPDT system dependent on the separation between the transmitter (TX) and receiver (RX). In this research, a free-running oscillator that uses stacked metamaterial as its resonator is proposed such that the system has TX/RX separation independent operation. Also, data is transmitted by modulating the current source of this oscillator.
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Outline of Annual Research Achievements |
The purpose of this research is the implementation of a metamaterial-assisted wireless power and data transfer (WPDT) system over a single channel to compact biomedical implants. Also, this WPDT system features 1- a free running oscillator for dynamic transfer, and 2-a clock and data recovery circuit in CMOS technology with low power consumption.
In this ficial year (FY2023), final prototypes of the metamaterial-assisted free running oscillator and its characterization have been completed. Results has been drafted and submitted to an international Q1 journal.
Finally, under the topic of clock and data recovery, a presentation has been has been done at an international conference. Moreover, a paper has been published on a highly impacted Q1 journal (IEEE-TAP).
|
Current Status of Research Progress |
Current Status of Research Progress
1: Research has progressed more than it was originally planned.
Reason
The planned test in phantom model has been performed early before and the results is submitted for review in an international journal.
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Strategy for Future Research Activity |
In FY2024, a new chip will be fabricated for the clock and data recovery circuit with lower power consumption. The obtained results will be summarized and published.
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