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Event-Clock Hybrid Driven Reconfigurable Perception-Computation Technology

Research Project

Project/Area Number 22K21280
Research Category

Grant-in-Aid for Research Activity Start-up

Allocation TypeMulti-year Fund
Review Section 1001:Information science, computer engineering, and related fields
Research InstitutionNara Institute of Science and Technology

Principal Investigator

KAN YIRONG  奈良先端科学技術大学院大学, 先端科学技術研究科, 助教 (50963732)

Project Period (FY) 2022-08-31 – 2025-03-31
Project Status Granted (Fiscal Year 2023)
Budget Amount *help
¥2,860,000 (Direct Cost: ¥2,200,000、Indirect Cost: ¥660,000)
Fiscal Year 2023: ¥1,430,000 (Direct Cost: ¥1,100,000、Indirect Cost: ¥330,000)
Fiscal Year 2022: ¥1,430,000 (Direct Cost: ¥1,100,000、Indirect Cost: ¥330,000)
KeywordsReconfigurable Hardware / Stochastic Computing / Spiking Neural Network / Reconfigurable Computing / CGRA / Neuromorphic Systems / Spiking Neural Networks / Hybrid Driven
Outline of Research at the Start

Future intelligent systems should not only be able to process information efficiently, but also be able to maintain continuous perception of the external environment. This research aims to develop a reconfigurable neuromorphic systems with adaptive perception-computation integration. By rationally merging adaptive spike representation, hybrid event-clock-driven neuron circuits and fully-parallel reconfigurable neural network architecture, low-power reconfigurable perception-computation integration for neuromorphic systems is expected to be achieved.

Outline of Annual Research Achievements

This year, we developed and verified the following technologies: (1) Designed and implemented an ultra-compact calculation unit with temporal-spatial re-configurability by combining a novel bisection neural network topology with stochastic computing; (2) Proposed a non-deterministic training approach for memory-efficient stochastic computing neural networks (SCNN). By introducing a multiple parallel training strategy, we greatly compress the computational latency and memory overhead of SCNN; (3) Developed a low-latency spiking neural network (SNN) with improved temporal dynamics. By analyzing the temporal dynamic characteristics of SNN encoding, we realized a high accuracy SNN model using fewer time steps.

Current Status of Research Progress
Current Status of Research Progress

2: Research has progressed on the whole more than it was originally planned.

Reason

Current research progress matches expectations. The main reasons are: (1) We implemented a computing platform with temporal-spatial reconfigurability through the combination of stochastic computing and bisection neural network;(2)The computational delay and memory overhead of stochastic computing neural networks are compressed through algorithm optimization;(3)A low-latency SNN model was developed via improved temporal dynamics. This year, three papers have been published at international conferences; one paper is currently being submitted to an international conference.

Strategy for Future Research Activity

We plan to combine SNN and bisection neural network topology to realize fully parallel and reconfigurable SNN hardware. By introducing structured sparse synaptic connections in SNNs, the neuron computation and weight storage costs can be significantly reduced. Benefiting from the hardware-friendly symmetric SNN topology, the accelerator is flexibly configured into multiple classifiers without hardware redundancy to support various tasks. We will explore how to achieve the highest classification performance with minimal hardware cost in the future work.

Report

(2 results)
  • 2023 Research-status Report
  • 2022 Research-status Report
  • Research Products

    (10 results)

All 2023 2022

All Journal Article (3 results) (of which Int'l Joint Research: 2 results,  Peer Reviewed: 3 results) Presentation (7 results) (of which Int'l Joint Research: 7 results)

  • [Journal Article] Bisection Neural Network Toward Reconfigurable Hardware Implementation2022

    • Author(s)
      Chen Yan、Zhang Renyuan、Kan Yirong、Yang Sa、Nakashima Yasuhiko
    • Journal Title

      IEEE Transactions on Neural Networks and Learning Systems

      Volume: Early Access Issue: 3 Pages: 1-11

    • DOI

      10.1109/tnnls.2022.3195821

    • Related Report
      2022 Research-status Report
    • Peer Reviewed / Int'l Joint Research
  • [Journal Article] MuGRA: A Scalable Multi-Grained Reconfigurable Accelerator Powered by Elastic Neural Network2022

    • Author(s)
      Kan Yirong、Wu Man、Zhang Renyuan、Nakashima Yasuhiko
    • Journal Title

      IEEE Transactions on Circuits and Systems I: Regular Papers

      Volume: 69 Issue: 1 Pages: 258-271

    • DOI

      10.1109/tcsi.2021.3099034

    • Related Report
      2022 Research-status Report
    • Peer Reviewed
  • [Journal Article] Online Learning of Parameters for Modeling User Preference Based on Bayesian Network2022

    • Author(s)
      Kan Yirong、Yue Kun、Wu Hao、Fu Xiaodong、Sun Zhengbao
    • Journal Title

      International Journal of Uncertainty, Fuzziness and Knowledge-Based Systems

      Volume: 30 Issue: 02 Pages: 285-310

    • DOI

      10.1142/s021848852250012x

    • Related Report
      2022 Research-status Report
    • Peer Reviewed / Int'l Joint Research
  • [Presentation] An Ultra-Compact Calculation Unit with Temporal-Spatial Re-configurability2023

    • Author(s)
      Guangxian Zhu, Yirong Kan, Renyuan Zhang, Yasuhiko Nakashima
    • Organizer
      2023 21st IEEE Interregional NEWCAS Conference (NEWCAS)
    • Related Report
      2023 Research-status Report
    • Int'l Joint Research
  • [Presentation] A Low Latency Spiking Neural Network with Improved Temporal Dynamics2023

    • Author(s)
      Yunpeng Yao, Yirong Kan, Guangxian Zhu, Renyuan Zhang
    • Organizer
      2023 IEEE 36th International System-on-Chip Conference (SOCC)
    • Related Report
      2023 Research-status Report
    • Int'l Joint Research
  • [Presentation] A Non-deterministic Training Approach for Memory-Efficient Stochastic Neural Networks2023

    • Author(s)
      Babak Golbabaei, Guangxian Zhu, Yirong Kan, Renyuan Zhang, Yasuhiko Nakashima
    • Organizer
      2023 IEEE 36th International System-on-Chip Conference (SOCC)
    • Related Report
      2023 Research-status Report
    • Int'l Joint Research
  • [Presentation] Adaptive spike-like representation of eeg signals for sleep stages scoring2022

    • Author(s)
      Lingwei Zhu, Ziwei Yang, Koki Odani, Guang Shi, Yirong Kan, Zheng Chen, Renyuan Zhang
    • Organizer
      2022 44th Annual International Conference of the IEEE Engineering in Medicine & Biology Society (EMBC)
    • Related Report
      2022 Research-status Report
    • Int'l Joint Research
  • [Presentation] A Stochastic Coding Method of EEG Signals for Sleep Stage Classification2022

    • Author(s)
      Guangxian Zhu, Huijia Wang, Yirong Kan, Zheng Chen, Ming Huang, MD Amin, Naoaki Ono, Shigehiko Kanaya, Renyuan Zhang, Yasuhiko Nakashima
    • Organizer
      2022 IEEE 35th International System-on-Chip Conference (SOCC)
    • Related Report
      2022 Research-status Report
    • Int'l Joint Research
  • [Presentation] Automatic Sleep Staging via Frequency-Wise Spiking Neural Networks2022

    • Author(s)
      Haohui Jia, Ziwei Yang, Pei Gao, Man Wu, Chen Li, Yirong Kan, Renyuan Zhang
    • Organizer
      2022 IEEE International Conference on Bioinformatics and Biomedicine (BIBM)
    • Related Report
      2022 Research-status Report
    • Int'l Joint Research
  • [Presentation] GAND-Nets: Training Deep Spiking Neural Networks with Ternary Weights2022

    • Author(s)
      Man Wu, Yirong Kan, Renyuan Zhang, Yasuhiko Nakashima
    • Organizer
      2022 IEEE 35th International System-on-Chip Conference (SOCC)
    • Related Report
      2022 Research-status Report
    • Int'l Joint Research

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Published: 2022-09-01   Modified: 2024-12-25  

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