Design of Fine-Grained Pipelined Systems for Nonvolatile Logic Applications
| Project/Area Number |
23700050
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| Research Category |
Grant-in-Aid for Young Scientists (B)
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| Allocation Type | Multi-year Fund |
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| Research Field |
Computer system/Network
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| Research Institution | Tohoku University |
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Principal Investigator |
MATSUNAGA SHOUN 東北大学, 省エネルギー・スピントロニクス集積化システムセ ンター, 研究支援者 (80551564)
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| Project Period (FY) |
2011 – 2013
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| Project Status |
Completed (Fiscal Year 2013)
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| Budget Amount *help |
¥4,420,000 (Direct Cost: ¥3,400,000、Indirect Cost: ¥1,020,000)
Fiscal Year 2013: ¥1,690,000 (Direct Cost: ¥1,300,000、Indirect Cost: ¥390,000)
Fiscal Year 2012: ¥1,040,000 (Direct Cost: ¥800,000、Indirect Cost: ¥240,000)
Fiscal Year 2011: ¥1,690,000 (Direct Cost: ¥1,300,000、Indirect Cost: ¥390,000)
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| Keywords | 並列処理 / 細粒度パイプライン / 細粒度パワーゲーティング / 非同期 / 不揮発 / SAD / CAM / MTJ素子 / 連想メモリ / 国際情報交換 / カナダ / 機能メモリ / パイプライン / 国際情報交流 |
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| Research Abstract |
In this research, fine-grained pipelined systems for nonvolatile logic applications have been proposed and designed with enhancing performances of the nonvolatile integrated logic circuits by the multi-functionality based on the nonvolatile memories such as ferroelectric and ferromagnetic devices. As examples of the nonvolatile logic applications, sum of absolute differences (SAD) circuits for motion-vector estimation in video data encoding and content-addressable memories (CAMs) for highly-parallel information retrieval have demonstrated with their high-speed and low-power consumptions based on the fine-grained pipelining and power gating techniques.
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Report
(4 results)
Research Products
(26 results)
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[Presentation] Design of a No-Standby Energy Pipelined LSI Processor Using MTJ-Based Nonvolatile Logic-in-Memory Architecture2013
Author(s)
Magdalena Sihotang, Shoun Matsunaga, Noboru Sakimura, Ryusuke Nebashi, Yukihide Tsuji, Ayuka Morioka, Tadahiko Sugibayashi, Sadahiko Miura, Hiroaki Honjo, Keizo Kinoshita, Shoji Ikeda, Hideo Sato, Syunsuke Fukami, Masanori Natsui, Tetsuo Endoh, Hideo Ohno, and Takahiro Hanyu
Organizer
IEEE International Solid-State Circuits Conference (Student Research Preview)
Place of Presentation
アメリカ
Year and Date
2013-02-17
Related Report
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