• Search Research Projects
  • Search Researchers
  • How to Use
  1. Back to previous page

Ultra-high-speed Disparity/motion estimation architecture for FTV and SHV

Research Project

Project/Area Number 23860052
Research Category

Grant-in-Aid for Research Activity Start-up

Allocation TypeSingle-year Grants
Research Field System engineering
Research InstitutionWaseda University

Principal Investigator

ZHOU Dajiang  早稲田大学, 理工学術院, 助教 (10607336)

Project Period (FY) 2011 – 2012
Project Status Completed (Fiscal Year 2012)
Budget Amount *help
¥3,250,000 (Direct Cost: ¥2,500,000、Indirect Cost: ¥750,000)
Fiscal Year 2012: ¥1,560,000 (Direct Cost: ¥1,200,000、Indirect Cost: ¥360,000)
Fiscal Year 2011: ¥1,690,000 (Direct Cost: ¥1,300,000、Indirect Cost: ¥390,000)
KeywordsSHV / スーパーハイビジョン / FTV / 自由視点テレビ / 動き予測
Research Abstract

FTV (Free-viewpoint Television) and SHV (Super Hi-Vision) are two promising research targets for the next-generation video services. To achieve these targets, a crucial technology is ultra-high-throughput video encoder VLSI, with disparity/motion estimation (DME) as its core component. To meet the requirement of FTV/SHV, we developed a 2Gpixels/s DME architecture design, which is near 10 times faster than the state-of-the-art works.

Report

(3 results)
  • 2012 Annual Research Report   Final Research Report ( PDF )
  • 2011 Annual Research Report
  • Research Products

    (27 results)

All 2013 2012 2011 Other

All Journal Article (7 results) (of which Peer Reviewed: 5 results) Presentation (17 results) Remarks (3 results)

  • [Journal Article] High-performance H.264/AVC intra prediction architecture for Ultra-HD video applications2013

    • Author(s)
      Gang He, Dajiang Zhou, Wei Fei, Zhixiang Chen, Jinjia Zhou, Satoshi Goto
    • Journal Title

      IEEE Transactions on Very Large Scale Integration (VLSI) Systems (TVLSI)

    • Related Report
      2012 Final Research Report
  • [Journal Article] High-performance H.264/AVC intra prediction architecture for Ultra-HD video applications2013

    • Author(s)
      Gang He, Dajiang Zhou, Wei Fei, Zhixiang Chen, Jinjia Zhou, and Satoshi Goto
    • Journal Title

      IEEE Transactions on Very Large Scale IntegrationSystem

      Volume: 99 Issue: 1 Pages: 1-14

    • DOI

      10.1109/tvlsi.2012.2235090

    • Related Report
      2012 Annual Research Report
    • Peer Reviewed
  • [Journal Article] An advanced hierarchical motion estimation scheme with lossless frame recompression and early level termination for beyond high definition video coding2012

    • Author(s)
      Xuena Bao, Dajiang Zhou, Peilin Liu, Satoshi Goto
    • Journal Title

      IEEE Transactions on Multimedia (TMM)

      Volume: Vol.14, No.2 Pages: 237-249

    • Related Report
      2012 Final Research Report
  • [Journal Article] An advanced hierarchical motion estimation scheme with lossless frame recompression and early level termination for beyond high definition video coding2012

    • Author(s)
      X.Bao, D.Zhou, P.Liu, S.Goto
    • Journal Title

      IEEE Transactions on Multimedia

      Volume: 2 Pages: 237-249

    • Related Report
      2011 Annual Research Report
    • Peer Reviewed
  • [Journal Article] A 530 Mpixels/s 4096x2160@60fps H.264/AVC high profile video decoder chip2011

    • Author(s)
      D.Zhou, J.Zhou, X.He, T.Zhu, J.Kong, P.Liu, S.Goto
    • Journal Title

      IEEE Journal of Solid-State Circuits

      Volume: 4 Pages: 777-788

    • Related Report
      2011 Annual Research Report
    • Peer Reviewed
  • [Journal Article] Cache Based Motion Compensation Architecture for Quad-HD H.264/AVC Video Decoder2011

    • Author(s)
      J.Zhou, D.Zhou, G.He, S.Goto
    • Journal Title

      IEICE Transactions on Electronics

      Volume: E94-C Issue: 4 Pages: 439-447

    • DOI

      10.1587/transele.E94.C.439

    • NAID

      10029505360

    • ISSN
      0916-8524, 1745-1353
    • Related Report
      2011 Annual Research Report
    • Peer Reviewed
  • [Journal Article] A 530Mpixels/s Intra Prediction Architecture for Ultra High Definition H.264/AVC Encoder2011

    • Author(s)
      G.He, D.Zhou, J.Zhou,. S.Goto
    • Journal Title

      IEICE Transactions on Electronics

      Volume: E94-C Issue: 4 Pages: 419-427

    • DOI

      10.1587/transele.E94.C.419

    • NAID

      10029505323

    • ISSN
      0916-8524, 1745-1353
    • Related Report
      2011 Annual Research Report
    • Peer Reviewed
  • [Presentation] A 1.59Gpixel/s motion estimation processor with -211-to-211 search range for UHDTV video encoder2013

    • Author(s)
      Jinjia Zhou, Dajiang Zhou, Gang He, and Satoshi Goto
    • Organizer
      Symposium on VLSI Circuits (VLSI)
    • Place of Presentation
      Kyoto, Japan
    • Related Report
      2012 Final Research Report
  • [Presentation] A 24.5-53.6pJ/pixel 4320p 60fps H.264/AVC intra-frame video encoder chip in 65nm CMOS2013

    • Author(s)
      Dajiang Zhou, Gang He, Wei Fei, Zhixiang Chen, Jinjia Zhou, and Satoshi Goto
    • Organizer
      Asia and South Pacific Design Automation Conference (ASP-DAC)
    • Place of Presentation
      Yokohama, Japan
    • Related Report
      2012 Final Research Report
  • [Presentation] An optimized MC interpolation architecture for HEVC2012

    • Author(s)
      Z.Guo, D.Zhou, S.Goto
    • Organizer
      IEEE International Conference on Acoustics, speech, and Signal Processing (ICASSP) 2012
    • Place of Presentation
      国立京都国際会館(京都府)
    • Year and Date
      2012-03-28
    • Related Report
      2011 Annual Research Report
  • [Presentation] A 2Gpixel/s H.264/AVC HP/MVC video decoder chip for Super Hi-Vision and 3DTV/FTV applications2012

    • Author(s)
      D.Zhou, J.Zhou, J.Zhu, P.Liu, S.Goto
    • Organizer
      IEEE International Solid-State Circuits Conference (ISSCC) 2012
    • Place of Presentation
      サンフランシスコ(米国)
    • Year and Date
      2012-02-21
    • Related Report
      2011 Annual Research Report
  • [Presentation] Interlaced asymmetric search range assignment for bidirectional motion estimation2012

    • Author(s)
      Jinjia Zhou, Dajiang Zhou, and Satoshi Goto
    • Organizer
      IEEE Int'l Conference on Image Processing (ICIP)
    • Place of Presentation
      Orlando, USA
    • Related Report
      2012 Final Research Report
  • [Presentation] A 1991 Mpixels/s intra prediction architecture for Super Hi-Vision H.264/AVC encoder2012

    • Author(s)
      Gang He, Dajiang Zhou, Jinjia Zhou, and Satoshi Goto
    • Organizer
      European Signal Processing Conference (EUSIPCO)
    • Place of Presentation
      Bucharest, Romania
    • Related Report
      2012 Final Research Report
  • [Presentation] A low-complexity HEVC intra prediction algorithm based on level and mode filtering2012

    • Author(s)
      Heming Sun, Dajiang Zhou, and Satoshi Goto
    • Organizer
      IEEE International Conference on Multimedia and Expo (ICME)
    • Place of Presentation
      Melbourne, Australia
    • Related Report
      2012 Final Research Report
  • [Presentation] A 4320p 60fps H.264/AVC intra-frame encoder chip with 1.41Gbins/s CABAC2012

    • Author(s)
      Dajiang Zhou, Gang He, Wei Fei, Zhixiang Chen, Jinjia Zhou, and Satoshi Goto
    • Organizer
      Symposium on VLSI Circuits (VLSI)
    • Place of Presentation
      Honolulu, USA
    • Related Report
      2012 Final Research Report
  • [Presentation] An optimized MC interpolation architecture for HEVC2012

    • Author(s)
      Zhenyan Guo, Dajiang Zhou, and Satoshi Goto
    • Organizer
      IEEE Int'l Conference on Acoustics, Speech, and Signal Processing (ICASSP)
    • Place of Presentation
      Kyoto, Japan
    • Related Report
      2012 Final Research Report
  • [Presentation] A 1 Gbin/s CABAC encoder for H.264/AVC2011

    • Author(s)
      W.Fei, D.Zhou, S.Goto
    • Organizer
      European Signal Processing Conference (EUSIPCO) 2011
    • Place of Presentation
      バルセロナ(スペイン)
    • Year and Date
      2011-09-01
    • Related Report
      2011 Annual Research Report
  • [Presentation] A 16-65 cycles/MB H.264/AVC motion compensation architecture for quad-HD applications2011

    • Author(s)
      J.Zhou, D.Zhou, G.He, S.Goto
    • Organizer
      European Signal Processing Conference (EUSIPCO) 2011
    • Place of Presentation
      バルセロナ(スペイン)
    • Year and Date
      2011-08-31
    • Related Report
      2011 Annual Research Report
  • [Presentation] A 1.59Gpixel/s motion estimation processor with -211-to-211 search range for UHDTV video encoder

    • Author(s)
      J. Zhou, D. Zhou, G. He, S. Goto
    • Organizer
      Symposium on VLSI Circuits 2013
    • Place of Presentation
      Kyoto, Japan
    • Related Report
      2012 Annual Research Report
  • [Presentation] A 24.5-53.6pJ/pixel 4320p 60fps H.264/AVC intra-frame video encoder chip in 65nm CMOS

    • Author(s)
      D. Zhou, G. He, W. Fei, Z. Chen, J. Zhou, S. Goto
    • Organizer
      Asia and South Pacific Design Automation Conference 2013
    • Place of Presentation
      Yokohama, Japan
    • Related Report
      2012 Annual Research Report
  • [Presentation] Interlaced asymmetric search range assignment for bidirectional motion estimation

    • Author(s)
      J. Zhou, D. Zhou, S. Goto
    • Organizer
      IEEE International Conference on Image Processing 2012
    • Place of Presentation
      Orlando, USA
    • Related Report
      2012 Annual Research Report
  • [Presentation] A 1991 Mpixels/s intra prediction architecture for Super Hi-Vision H.264/AVC encoder

    • Author(s)
      G. He, D. Zhou, J. Zhou, S. Goto
    • Organizer
      European Signal Processing Conference 2012
    • Place of Presentation
      Bucharest, Romania
    • Related Report
      2012 Annual Research Report
  • [Presentation] A low-complexity HEVC intra prediction algorithm based on level and mode filtering

    • Author(s)
      H. Sun, D. Zhou, S. Goto
    • Organizer
      IEEE International Conference on Multimedia and Expo 2012
    • Place of Presentation
      Melbourne, Australia
    • Related Report
      2012 Annual Research Report
  • [Presentation] A 4320p 60fps H.264/AVC intra-frame encoder chip with 1.41Gbins/s CABAC

    • Author(s)
      D. Zhou, G. He, W. Fei, Z. Chen, J. Zhou, S. Goto
    • Organizer
      Symposium on VLSI Circuits 2012
    • Place of Presentation
      Honolulu, USA
    • Related Report
      2012 Annual Research Report
  • [Remarks]

    • URL

      http://www.aoni.waseda.jp/zhou

    • Related Report
      2012 Final Research Report
  • [Remarks] Dajiang Zhou's Homepage

    • URL

      http://www.aoni.waseda.jp/zhou/

    • Related Report
      2012 Annual Research Report
  • [Remarks]

    • URL

      http://www.aoni.waseda.jp/zhou

    • Related Report
      2011 Annual Research Report

URL: 

Published: 2011-09-05   Modified: 2019-07-29  

Information User Guide FAQ News Terms of Use Attribution of KAKENHI

Powered by NII kakenhi