| Budget Amount *help |
¥15,730,000 (Direct Cost: ¥12,100,000、Indirect Cost: ¥3,630,000)
Fiscal Year 2015: ¥1,690,000 (Direct Cost: ¥1,300,000、Indirect Cost: ¥390,000)
Fiscal Year 2014: ¥5,200,000 (Direct Cost: ¥4,000,000、Indirect Cost: ¥1,200,000)
Fiscal Year 2013: ¥4,160,000 (Direct Cost: ¥3,200,000、Indirect Cost: ¥960,000)
Fiscal Year 2012: ¥4,680,000 (Direct Cost: ¥3,600,000、Indirect Cost: ¥1,080,000)
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| Outline of Final Research Achievements |
This research is aiming at design technologies for a heterogeneous computing platform consisting of CPU cores, GPUs, and FPGAs. FPGAs allows us to build the application-specific accelerators since it's datapath can be reconfigured by programming after fabrication. One major difficulty in designing the heterogeneous computing platform is to find task allocation maximizing the performance and to design the FPGA datapath as easily as possible. In order to solve this problem, we develop high-level synthesis technologies for the heterogeneous computing platform.
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