| Budget Amount *help |
¥16,250,000 (Direct Cost: ¥12,500,000、Indirect Cost: ¥3,750,000)
Fiscal Year 2014: ¥4,680,000 (Direct Cost: ¥3,600,000、Indirect Cost: ¥1,080,000)
Fiscal Year 2013: ¥5,460,000 (Direct Cost: ¥4,200,000、Indirect Cost: ¥1,260,000)
Fiscal Year 2012: ¥6,110,000 (Direct Cost: ¥4,700,000、Indirect Cost: ¥1,410,000)
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| Outline of Final Research Achievements |
When developing new hardware/software, it is essential to utilize existing designs efficiently and correctly. We have developed new methods which define and analyze the difference between old and new designs as transformations on sub-circuits and sub-programs. With the proposed methods, users can specify how much modifications/additions are allowed on the old designs in order to meet new specifications. Appropriate transformations are automatically identified with very small numbers of test patterns. With joint efforts with industry, practical usefulness of the proposed methods have been shown by applying them to the real server machines designs. Moreover, the proposed methods can be used as automatic test patterns generation methods for various types of multiple faults or bugs in the design, and for the first time, complete sets of test patterns for multiple faults have successfully been generated on the circuits having more than 10,000 gates.
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