Budget Amount *help |
¥5,200,000 (Direct Cost: ¥4,000,000、Indirect Cost: ¥1,200,000)
Fiscal Year 2014: ¥1,430,000 (Direct Cost: ¥1,100,000、Indirect Cost: ¥330,000)
Fiscal Year 2013: ¥1,690,000 (Direct Cost: ¥1,300,000、Indirect Cost: ¥390,000)
Fiscal Year 2012: ¥2,080,000 (Direct Cost: ¥1,600,000、Indirect Cost: ¥480,000)
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Outline of Final Research Achievements |
We have proposed and implemented an error diagnosis technique combining BDD-based functional approach and SAT-solver, which makes it possible to diagnose large scale circuits including a lot of logic design errors. In addition, we have applied it to an incremental synthesis system employing RECON (reconfigurable) cells to fix ECO’s (Engineering Change Orders) only by changing metal layer masks. The experimental results have shown that the proposed system is effective to reduce costs needed for ECO’s.
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