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Development of fine grain variable stages pipeline processor for high performance and low power consumption

Research Project

Project/Area Number 24700047
Research Category

Grant-in-Aid for Young Scientists (B)

Allocation TypeMulti-year Fund
Research Field Computer system/Network
Research InstitutionMie University

Principal Investigator

Sasaki Takahiro  三重大学, 工学(系)研究科(研究院), 助教 (20362361)

Project Period (FY) 2012-04-01 – 2016-03-31
Project Status Completed (Fiscal Year 2015)
Budget Amount *help
¥4,160,000 (Direct Cost: ¥3,200,000、Indirect Cost: ¥960,000)
Fiscal Year 2014: ¥1,170,000 (Direct Cost: ¥900,000、Indirect Cost: ¥270,000)
Fiscal Year 2013: ¥780,000 (Direct Cost: ¥600,000、Indirect Cost: ¥180,000)
Fiscal Year 2012: ¥2,210,000 (Direct Cost: ¥1,700,000、Indirect Cost: ¥510,000)
Keywordsプロセッサ / 高性能低消費電力 / パイプラインプロセッサ / 可変パイプライン段数 / 低消費電力プロセッサ / 可変パイプライン構造 / プロセッサアーキテクチャ / 低消費電力高性能プロセッサ / 可変パイプラン構造
Outline of Final Research Achievements

Today, high-performance and low-power processor is required. Generally, a processor load changes frequently on program execution. However, many processors do not take advantage of this feature.
This research proposes a fine grain variable structure to achieve both high performance and low power. When a load is low, pipeline stages are unified for low power. On the other hand, a load is high, pipeline stages are divided to construct deep pipeline for high performance. The proposed methods changes these two modes in short time.

Report

(5 results)
  • 2015 Annual Research Report   Final Research Report ( PDF )
  • 2014 Research-status Report
  • 2013 Research-status Report
  • 2012 Research-status Report
  • Research Products

    (22 results)

All 2015 2014 2013 2012

All Journal Article (2 results) (of which Peer Reviewed: 2 results) Presentation (20 results) (of which Int'l Joint Research: 2 results)

  • [Journal Article] Design and Evaluation of Fine-grain Mode Transition Method based on Dynamic Memory Access Analyzing for Variable Stages Pipeline Processor2013

    • Author(s)
      Sasaki, T., Nakabayashi, T., Nomura, K., Ohno, K. and Kondo, T.
    • Journal Title

      IET Journal of Computers and Digital Techniques

      Volume: 7 Issue: 1 Pages: 41-47

    • DOI

      10.1049/iet-cdt.2012.0067

    • Related Report
      2013 Research-status Report 2012 Research-status Report
    • Peer Reviewed
  • [Journal Article] Energy Optimization using Fine-Grain Variable Stages Pipeline Processor Chip2013

    • Author(s)
      Tomoyuki NAKABAYASHI, Takahiro SASAKI, Hitoshi NAKAMURA, Kazuhiko OHNO, Toshio KONDO
    • Journal Title

      International Journal of Networking and Computing

      Volume: 3 Pages: 400-405

    • NAID

      130005475370

    • Related Report
      2013 Research-status Report
    • Peer Reviewed
  • [Presentation] MIPSベースプロセッサのTLB機構の改良による高性能化2015

    • Author(s)
      武藤郡,佐々木敬泰,深澤祐樹,近藤利夫
    • Organizer
      電子情報通信学会研究会
    • Place of Presentation
      京都工芸繊維大(京都府京都市)
    • Year and Date
      2015-12-17
    • Related Report
      2015 Annual Research Report
  • [Presentation] An architectural framework of snoopy interconnection for heterogeneous cache systems2015

    • Author(s)
      Seiji Miyoshi, Takahiro Sasaki, Yuki Fukazawa and Toshio Kondo
    • Organizer
      CANDAR 2015
    • Place of Presentation
      札幌市産業振興センター(北海道札幌市)
    • Year and Date
      2015-12-08
    • Related Report
      2015 Annual Research Report
    • Int'l Joint Research
  • [Presentation] Register port prediction for a banked register file2015

    • Author(s)
      Hiroaki Kawashima, Takahiro Sasaki, Yuki Fukazawa and Toshio Kondo
    • Organizer
      CANDAR 2015
    • Place of Presentation
      札幌市産業振興センター(北海道札幌市)
    • Year and Date
      2015-12-08
    • Related Report
      2015 Annual Research Report
    • Int'l Joint Research
  • [Presentation] マルチバンク化と書込予測を用いた小面積レジスタファイルの提案2015

    • Author(s)
      川島弘晃,佐々木敬泰,深澤祐樹,近藤利夫
    • Organizer
      情報処理学会研究会
    • Place of Presentation
      別府国際コンベンションセンター(大分県別府市)
    • Year and Date
      2015-08-04
    • Related Report
      2015 Annual Research Report
  • [Presentation] 可変レベルキャッシュのモード切り換えアルゴリズムの改良2015

    • Author(s)
      刀根舞歌,佐々木敬泰,深澤祐樹,近藤利夫
    • Organizer
      情報処理学会研究会
    • Place of Presentation
      別府国際コンベンションセンター(大分県別府市)
    • Year and Date
      2015-08-04
    • Related Report
      2015 Annual Research Report
  • [Presentation] スタンダードセルベース設計用のCAM型TLBの実装手法の提案2015

    • Author(s)
      武藤郡,佐々木敬泰,深澤祐樹,近藤利夫
    • Organizer
      情報処理学会研究会
    • Place of Presentation
      別府国際コンベンションセンター(大分県別府市)
    • Year and Date
      2015-08-04
    • Related Report
      2015 Annual Research Report
  • [Presentation] 機器への組込み容易なソフトマクロプロセッサの開発2015

    • Author(s)
      杉山 智之,佐々木 敬泰,近藤 利夫
    • Organizer
      電子情報通信学会研究会
    • Place of Presentation
      鹿児島県奄美市・奄美市社会福祉協議会
    • Year and Date
      2015-03-06 – 2015-03-07
    • Related Report
      2014 Research-status Report
  • [Presentation] Detail Design and Evaluation of FabCache2014

    • Author(s)
      Takaki Okamoto, Tomoyuki Nakabayashi, Takahiro Sasaki and Toshio Kondo
    • Organizer
      International Symposium on Computing and Networking
    • Place of Presentation
      静岡県静岡市・静岡コンベンションアーツセンター
    • Year and Date
      2014-12-10 – 2014-12-12
    • Related Report
      2014 Research-status Report
  • [Presentation] Co-simulation framework for streamlining microprocessor development on standard ASIC design flow2014

    • Author(s)
      T. Nakabayashi, T. Sugiyama, T. Sasaki, E. Rotenberg, and T. Kondo.
    • Organizer
      Asia and South Pacific Design Automation Conference
    • Place of Presentation
      Sun Tec, Singapore
    • Related Report
      2013 Research-status Report
  • [Presentation] Fabrication and Evaluation of Variable Stages Pipeline Processor Chip with Fine-grain Mode Transition Controller2013

    • Author(s)
      Hitoshi NAKAMURA, Takahiro SASAKI, Toshio KONDO
    • Organizer
      ITC-CSCC 2013
    • Place of Presentation
      Yeosu, South Korea
    • Related Report
      2013 Research-status Report
  • [Presentation] FabBus: A Bus Framework for Heterogeneous Multi-core processor2013

    • Author(s)
      Yusuke SETO, Takahiro SASAKI, Toshio KONDO
    • Organizer
      ITC-CSCC 2013
    • Place of Presentation
      Yeosu, South Korea
    • Related Report
      2013 Research-status Report
  • [Presentation] Development of C++/RTL co-simulation environment for accelerating VLSI design of an embedded processor2013

    • Author(s)
      Tomoyuki SUGIYAMA, Takahiro SASAKI, Toshio KONDO
    • Organizer
      ITC-CSCC 2013
    • Place of Presentation
      Yeosu, South Korea
    • Related Report
      2013 Research-status Report
  • [Presentation] FabScalarを用いた可変段数パイプライン構造を有するスーパースカラコアの詳細設計2013

    • Author(s)
      三好聖二,中林智之,佐々木敬泰,近藤利夫
    • Organizer
      電子情報通信学会研究会(SWoPP2013)
    • Place of Presentation
      北九州市, 福岡県
    • Related Report
      2013 Research-status Report
  • [Presentation] Reducing Dynamic Energy of Variable Level Cache2013

    • Author(s)
      Ko WATANABE, Takahiro SASAKI, Tomoyuki NAKABAYASHI, Kazuhiko OHNO, Toshio KONDO
    • Organizer
      International Conference on Computer Technology and Science
    • Place of Presentation
      Dubai, United Arab Emirates
    • Related Report
      2013 Research-status Report
  • [Presentation] FabCache: Cache Design Automation for Heterogeneous Multi-core Processors2013

    • Author(s)
      T. Okamoto, T. Nakabayashi, T.Sasaki, T. Kondo
    • Organizer
      International Symposium on Computing and Networking Across Practical Development and Theoretical Research
    • Place of Presentation
      Ehime, Japan
    • Related Report
      2013 Research-status Report
  • [Presentation] Dynamic BTB Resizing for Variable Stages Superscalar Architecture2013

    • Author(s)
      T. Nakabayashi, T. Sasaki, T., and T. KondoT. Nakabayashi, T. Sasaki, T., and T. KondoT. Nakabayashi, T. Sasaki, T., and T. Kondo
    • Organizer
      International Symposium on Computing and Networking Across Practical Development and Theoretical Research
    • Place of Presentation
      Ehime, Japan
    • Related Report
      2013 Research-status Report
  • [Presentation] Measurement of Low-Energy Processor Chip using Fine-Grain Variable Stages Pipeline Architecture2012

    • Author(s)
      Tomoyuki NAKABAYASHI, Takahiro SASAKI, Hiroshi NAKAMURA, Oazuhiko OHNO, Toshio KONDO
    • Organizer
      International Conference on Networking and Computing (ICNC)
    • Place of Presentation
      Okinawa, Japan
    • Related Report
      2012 Research-status Report
  • [Presentation] VLSI implementation of Variable Stages Pipeline Processor using Fine-Grain Pipeline Depth Controller2012

    • Author(s)
      Nakabayashi, T., Sasaki, T., Ohno, K. and Kondo, T.
    • Organizer
      International Technical Conference on Circuits/Systems, Computers and Communications
    • Place of Presentation
      Hokkaido, Japan
    • Related Report
      2012 Research-status Report
  • [Presentation] FabScalarのAlpha 21264命令セット対応とマルチプロセッサ環境フレームワークの構築2012

    • Author(s)
      中林智之,佐々木敬泰,Eric Rotenberg,大野和彦,近藤利夫
    • Organizer
      先進的計算基盤システムシンポジウム
    • Place of Presentation
      神戸市
    • Related Report
      2012 Research-status Report
  • [Presentation] 細粒度モード切換コントローラを用いた可変パイプライン段数プロセッサのチップ試作と評価2012

    • Author(s)
      中村仁,中林智之,佐々木敬泰,大野和彦,近藤利夫
    • Organizer
      先進的計算基盤システムシンポジウム
    • Place of Presentation
      神戸市
    • Related Report
      2012 Research-status Report

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Published: 2013-05-31   Modified: 2019-07-29  

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