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Design of a Universal VLSI Platform for Highly-Safe Intelligent Systems Applications

Research Project

Project/Area Number 25280011
Research Category

Grant-in-Aid for Scientific Research (B)

Allocation TypePartial Multi-year Fund
Section一般
Research Field Computer system
Research InstitutionTohoku University

Principal Investigator

Kameyama Michitaka  東北大学, 情報科学研究科, 教授 (70124568)

Project Period (FY) 2013-04-01 – 2016-03-31
Project Status Completed (Fiscal Year 2015)
Budget Amount *help
¥12,740,000 (Direct Cost: ¥9,800,000、Indirect Cost: ¥2,940,000)
Fiscal Year 2015: ¥4,030,000 (Direct Cost: ¥3,100,000、Indirect Cost: ¥930,000)
Fiscal Year 2014: ¥4,550,000 (Direct Cost: ¥3,500,000、Indirect Cost: ¥1,050,000)
Fiscal Year 2013: ¥4,160,000 (Direct Cost: ¥3,200,000、Indirect Cost: ¥960,000)
Keywords高安全知能システム / リアルワールド応用 / VLSIプラットフォーム / アルゴリズム選択 / ダイナミックリコンフィギャラブルVLSI / マイクロパケット転送 / コンフィグレーション/コントロールメモリ / 危険要素検出 / 階層構造ダイナミックリコンフィギャラブルVLSI / コンフィグレーションメモリサイズ / 高安全システム / 画像認識 / 画像認識アルゴリズム / コンフィグレーションメモリサイズ減少
Outline of Final Research Achievements

A computing platform for real-world intelligent systems is desired to contribute to low-cost implementation as well as high-quality and high-performance processing. As real-world applications, we consider advanced intelligent systems such as a highly-safe system. A universal platform for real-world intelligent systems are developed that from a set of training samples learns to select the best algorithm, so that it provides adaptive algorithm selection capability according to real-world environment conditions. Also, new dynamic reconfigurable VLSIs superior to the conventional FPGAs are developed based on new-concept architectures such as hierarchical structure which leads to seamless integration from coarse-grain to fine-grain reconfiguration, based on direct allocation of a control data flow graph which leads to reduction of interconnection and switch-box complexity, micropacket data transfer scheme which leads to configuration/control memory size reduction.

Report

(4 results)
  • 2015 Annual Research Report   Final Research Report ( PDF )
  • 2014 Annual Research Report
  • 2013 Annual Research Report
  • Research Products

    (28 results)

All 2015 2014 2013 Other

All Journal Article (17 results) (of which Int'l Joint Research: 3 results,  Peer Reviewed: 16 results,  Open Access: 1 results,  Acknowledgement Compliant: 1 results) Presentation (11 results) (of which Int'l Joint Research: 1 results,  Invited: 2 results)

  • [Journal Article] Asynchronous Domino Logic Pipeline Design Based on Constructed Critical Data Path2015

    • Author(s)
      Zhengfan Xia, Masanori Hariyama, Michitaka Kameyama
    • Journal Title

      IEEE Transactions on Very Large Scale Integration Systems

      Volume: Vol.23, No.4 Issue: 4 Pages: 619-630

    • DOI

      10.1109/tvlsi.2014.2314685

    • Related Report
      2015 Annual Research Report
    • Peer Reviewed
  • [Journal Article] Data-Transfer-Aware Design of an FPGA-Based Heterogeneous Multicore Platform with Custom Accelerators2015

    • Author(s)
      Yasuhiro Takei, Hasitha Muthumala Waidyasooriya, Masanori Hariyama and Michitaka Kameyama
    • Journal Title

      IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences

      Volume: E98.A Issue: 12 Pages: 2658-2669

    • DOI

      10.1587/transfun.E98.A.2658

    • NAID

      130005111969

    • ISSN
      0916-8508, 1745-1337
    • Related Report
      2015 Annual Research Report
    • Peer Reviewed / Open Access
  • [Journal Article] Symbolic Segmentation Using Algorithm Selection and Semantic Feedback2015

    • Author(s)
      Martin Lukac, Kamila Abdiyeva, Michitaka Kameyama
    • Journal Title

      Scene Understanding Workshop 2015

      Volume: -

    • Related Report
      2015 Annual Research Report
    • Peer Reviewed / Int'l Joint Research
  • [Journal Article] Evaluation of Algorithm Selection Approach for Semantic Segmentation Based on High-Level Information Feedback2015

    • Author(s)
      Martin Lukac, Kamila Abdiyeva, Michitaka Kameyama
    • Journal Title

      International Conference on Information and Digital Technologies

      Volume: - Pages: 212-218

    • Related Report
      2015 Annual Research Report
    • Int'l Joint Research
  • [Journal Article] Algorithm Selection Platform in Real-World Intelligent Systems2015

    • Author(s)
      Martin Lukac, Kamila Abdiyeva, Yoshichika Fujioka, Michitaka Kameyama
    • Journal Title

      28th InterncationConference on Computer Applications in Industry and Engineering

      Volume: - Pages: 227-234

    • Related Report
      2015 Annual Research Report
    • Peer Reviewed / Int'l Joint Research / Acknowledgement Compliant
  • [Journal Article] Bayesian-Network-Based Algorithm Selection with High Level Representation Feedback for Real-World Intelligent Systems2015

    • Author(s)
      Lukac M., Kameyama M.
    • Journal Title

      IT in Industry

      Volume: Vol.3, Issue.1 Pages: 10-15

    • Related Report
      2014 Annual Research Report
    • Peer Reviewed
  • [Journal Article] Automatic Algorithm Selection for Real-World Intelligent Systems Platform2014

    • Author(s)
      Martin Lukac, Michitaka Kameyama and Yoshichika Fujioka
    • Journal Title

      Proceedings of the 23rd International Workshop on Post-Binary ULSI Systems

      Volume: - Pages: 7-14

    • Related Report
      2014 Annual Research Report
    • Peer Reviewed
  • [Journal Article] An Asynchronous High-Performance FPGA Based on LEDR/Four-Phase-Dual-Rail Hybrid Architecture2014

    • Author(s)
      Yoshiya Komatsu, Masanori Hariyama and Michitaka Kameyama
    • Journal Title

      Proceedings of the 5th International Symposium on Highly-Efficient Accelerators and Reconfigurable Technologies

      Volume: - Pages: 111-114

    • NAID

      110009925727

    • Related Report
      2014 Annual Research Report
    • Peer Reviewed
  • [Journal Article] Bayesian-Network-Based Algorithm Selection with High Level Representation Feedback for Real-World Intelligent Systems2014

    • Author(s)
      Martin Lukac and Michitaka Kameyama
    • Journal Title

      The 9th International Conference on Information Technology and Applications (ICITA 2014)

      Volume: -

    • Related Report
      2014 Annual Research Report
    • Peer Reviewed
  • [Journal Article] A Bit-Serial Reconfigurable VLSI Based on a Multiple-Valued X-Net Data Transfer Scheme2013

    • Author(s)
      Xu Bai, Michitaka Kameyama
    • Journal Title

      IEICE Transactions on Information and Systems

      Volume: E96.D Issue: 7 Pages: 1449-1456

    • DOI

      10.1587/transinf.E96.D.1449

    • NAID

      130003370921

    • ISSN
      0916-8532, 1745-1361
    • Related Report
      2013 Annual Research Report
    • Peer Reviewed
  • [Journal Article] Architecture of an Asynchronous FPGA for Handshake-Component-Based Design2013

    • Author(s)
      Yoshiya Komatsu , Masanori Hariyama, Michitaka Kameyama
    • Journal Title

      IEICE Transactions on Information and Systems

      Volume: E96.D Issue: 8 Pages: 1632-1644

    • DOI

      10.1587/transinf.E96.D.1632

    • NAID

      130003370945

    • ISSN
      0916-8532, 1745-1361
    • Related Report
      2013 Annual Research Report
    • Peer Reviewed
  • [Journal Article] VLSI platform for Real-World Intelligent Integrated Systems based on Algorithm Selection2013

    • Author(s)
      Martin Lukac, Michitaka Kameyama and Yoshichika Fujioka
    • Journal Title

      IADIS International Journal on Computer Science and Information Systems

      Volume: Vol.8, No.2 Pages: 72-90

    • Related Report
      2013 Annual Research Report
    • Peer Reviewed
  • [Journal Article] An Area-Efficient Multiple-Valued Reconfigurable VLSI Architecture Using an X-Net2013

    • Author(s)
      Xu Bai, Michitaka Kameyama
    • Journal Title

      Proceedings of the 43th IEEE International Symposium on Multiple-Valued Logic

      Volume: - Pages: 272-277

    • DOI

      10.1109/ismvl.2013.13

    • Related Report
      2013 Annual Research Report
    • Peer Reviewed
  • [Journal Article] VLSI Platform for Real-World Intelligent Integrated Systems Based on Algorithm Selection2013

    • Author(s)
      Martin Lukac, Michitaka Kameyama1 and Yoshichika Fujiokam
    • Journal Title

      IADIS Theory and Practice in Modern Computing

      Volume: - Pages: 27-34

    • Related Report
      2013 Annual Research Report
    • Peer Reviewed
  • [Journal Article] An Area-Efficient Asynchronous FPGA Architecture for Handshake-Component-Based Design2013

    • Author(s)
      Yoshiya Komatsu, Masanori Hariyama and Michitaka Kameyama
    • Journal Title

      Proc. International Conference on Engineering of Reconfigurable Systems and Algorithms

      Volume: - Pages: 15-18

    • Related Report
      2013 Annual Research Report
    • Peer Reviewed
  • [Journal Article] Bayesian Network for Algorithm Selection: Real-World Hierarchy for Nodes Reduction2013

    • Author(s)
      Lukac M. and Kameyama M.
    • Journal Title

      International Conference on Awareness Science and Technology

      Volume: - Pages: 69-75

    • DOI

      10.1109/icawst.2013.6765411

    • Related Report
      2013 Annual Research Report
    • Peer Reviewed
  • [Journal Article] A Low-Power FPGA Based on Self-Adaptive Multi-Voltage Control2013

    • Author(s)
      Zhengfan Xia, Masanori Hariyama, Michitaka Kameyama
    • Journal Title

      Proc. International SoC Design Conference

      Volume: - Pages: 166-169

    • Related Report
      2013 Annual Research Report
    • Peer Reviewed
  • [Presentation] リアルワールド応用知能システムとそのVLSIコンピューティングプラットフォームの展望2015

    • Author(s)
      亀山充隆
    • Organizer
      電子情報通信学会集積回路研究会
    • Place of Presentation
      岩松旅館(仙台市青葉区)
    • Year and Date
      2015-10-27
    • Related Report
      2015 Annual Research Report
    • Invited
  • [Presentation] 危険要素抽出に基づく高安全システムの高品質化とVLSIプラットフォーム2015

    • Author(s)
      大河原茂樹,亀山充隆
    • Organizer
      FIT 情報科学技術フォーラム
    • Place of Presentation
      愛媛大学(松山市)
    • Year and Date
      2015-09-17
    • Related Report
      2015 Annual Research Report
  • [Presentation] 高安全知能システムの高品質化とVLSIコンピューティングプラットフォーム2015

    • Author(s)
      大河原茂樹,亀山充隆, 藤岡与周,
    • Organizer
      第38回多値論理フォーラム
    • Place of Presentation
      北海道大学(札幌市)
    • Year and Date
      2015-09-13
    • Related Report
      2015 Annual Research Report
  • [Presentation] 高安全知能システム用リコンフィギャラブルプロセッサのアーキテクチャ2015

    • Author(s)
      大河原茂樹,亀山充隆, 藤岡与周
    • Organizer
      電気関係学会東北支部連合大会
    • Place of Presentation
      岩手県立大学(滝沢市)
    • Year and Date
      2015-08-28
    • Related Report
      2015 Annual Research Report
  • [Presentation] Prospects of Computing Platform for Real-World Intelligent Systems2015

    • Author(s)
      Michitaka Kameyama
    • Organizer
      International Conference on Information and Digital Technologies 2015
    • Place of Presentation
      Zilina, Slovakia
    • Year and Date
      2015-07-09
    • Related Report
      2015 Annual Research Report
    • Int'l Joint Research / Invited
  • [Presentation] 危険要素抽出の高精度化に基づく高安全知能システムの構成2015

    • Author(s)
      大河原茂樹,亀山充隆
    • Organizer
      情報処理学会第77回全国大会
    • Place of Presentation
      京都大学(京都府京都市)
    • Year and Date
      2015-03-18
    • Related Report
      2014 Annual Research Report
  • [Presentation] 危険要素の抽出に基づく高安全知能システム2014

    • Author(s)
      大河原茂樹,Lukac Martin,亀山充隆
    • Organizer
      平成26年電気関係学会東北支部連合大会
    • Place of Presentation
      山形大学(山形県米沢市)
    • Year and Date
      2014-08-22
    • Related Report
      2014 Annual Research Report
  • [Presentation] LEDR/4相2線ハイブリッドアーキテクチャに基づく高性能非同期FPGA2014

    • Author(s)
      小松与志也,張山昌論,亀山充隆
    • Organizer
      電子情報通信学会 リコンフィギャラブルシステム研究会
    • Place of Presentation
      東北大学片平さくらホール(宮城県仙台市)
    • Year and Date
      2014-06-12
    • Related Report
      2014 Annual Research Report
  • [Presentation] パケット転送制御に基づくロジックインメモリ構造多値リコンフィギャラブルVLSI

    • Author(s)
      原田伸太郎,白 旭,藤岡与周,亀山充隆
    • Organizer
      平成25年度電気関係学会東北支部連合大会
    • Place of Presentation
      会津大学
    • Related Report
      2013 Annual Research Report
  • [Presentation] ビットシリアルパケット転送に基づくロジックインメモリ多値リコンフィギャラブルVLSI

    • Author(s)
      原田伸太郎,白旭,藤岡与周, 亀山充隆
    • Organizer
      第36回多値論理フォーラム(姫路)
    • Place of Presentation
      姫路市市民会館
    • Related Report
      2013 Annual Research Report
  • [Presentation] 電流モード論理に基づく多値細粒度リコンフィギャラブルVLSIの新概念アーキテクチャ

    • Author(s)
      白 旭, 亀山充隆
    • Organizer
      電子情報通信学会 集積回路研究会(ICD)
    • Place of Presentation
      弘前大学 コラボ弘大 八甲田ホール
    • Related Report
      2013 Annual Research Report

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Published: 2013-05-21   Modified: 2019-07-29  

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