Study on test and diagnosis for defects on vias in 3D-LSIs

• Project/Area Number: 25330062
• Research Category: Grant-in-Aid for Scientific Research (C)
• Allocation Type: Multi-year Fund
• Section: 一般
• Research Field: Computer system
• Research Institution: Ehime University
• Principal Investigator: Higami Yoshinobu 愛媛大学, 理工学研究科, 准教授 (40304654)
• Co-Investigator(Kenkyū-buntansha): TAKAHASHI HIROSHI 愛媛大学, 大学院理工学研究科, 教授 (80226878)
• Project Period (FY): 2013-04-01 – 2016-03-31
• Project Status: Completed (Fiscal Year 2015)
• Budget Amount: ¥4,420,000 (Direct Cost: ¥3,400,000、Indirect Cost: ¥1,020,000); Fiscal Year 2015: ¥1,560,000 (Direct Cost: ¥1,200,000、Indirect Cost: ¥360,000); Fiscal Year 2014: ¥1,430,000 (Direct Cost: ¥1,100,000、Indirect Cost: ¥330,000); Fiscal Year 2013: ¥1,430,000 (Direct Cost: ¥1,100,000、Indirect Cost: ¥330,000)
• Keywords: LSI / 故障診断 / 遅延故障 / 3次元LSI / LSIのテスト / LSIの故障診断

Outline of Final Research Achievements

When physical defects occur at vias in 3D-LSIs, propagation of signals will delay. In this research we develop diagnosis methods for delay faults. Targets are delay faults on gate signal lines and clock lines which have various amounts of delay. Also we consider hazard signals which change values temporarily. The effectiveness of the developed methods has been confirmed in the experiments for benchmark circuits.

Research Products

• [Int'l Joint Research] ウィスコンシン大学(米国)
• [Journal Article] Message from the Editor-in-Chief (2016)
  • Author(s): Y. Higami, S. Wang, H. Takahashi, S. Kobayashi and K. K. Saluja
  • Journal Title: IPSJ Transactions on System LSI Design Methodology Volume: 9 Issue: 0 Pages: 1-1
  • DOI: 10.2197/ipsjtsldm.9.1
  • NAID: 130005126057
  • ISSN: 1882-6687
  • Peer Reviewed / Int'l Joint Research / Acknowledgement Compliant
• [Journal Article] Diagnosis of Delay Faults in Multi-Clock SOCs (2014)
  • Author(s): Y. Higami, H. Takahashi, S. Kobayashi and K. K. Saluja
  • Journal Title: Proceedings of International Technical Conference on Circuits/Systems, Computers and Communications Volume: - Pages: 217-220
  • Peer Reviewed / Acknowledgement Compliant
• [Journal Article] Diagnosis of Gate Delay Faults in the Presence of Clock Delay Faults (2014)
  • Author(s): Y. Higami, H. Takahashi, S. Kobayashi and K. K. Saluja
  • Journal Title: Proceedings of IEEE Computer Society Annual Symposium on VLSI Volume: - Pages: 320-325
  • DOI: 10.1109/isvlsi.2014.60
  • Peer Reviewed / Acknowledgement Compliant
• [Journal Article] Generation for Delay Faults on Clock Lines under Launch-on-Capture Test Environment (2013)
  • Author(s): Yoshinobu Higami, Hiroshi Takahashi, Shin-ya Kobayashi and Kewal K. Saluja
  • Journal Title: IEICE Transactions on Information and Systems Volume: E96-D Pages: 1323-1331
  • Peer Reviewed
• [Presentation] Diagnosis of Delay Faults Considering Hazards (2015)
  • Author(s): Y. Higami, S. Wang, H. Takahashi, S. Kobayashi and K. K. Saluja
  • Organizer: IEEE Computer Society Annual Symposium on VLSI
  • Place of Presentation: フランス モンペリエ
  • Year and Date: 2015-07-08
  • Int'l Joint Research
• [Presentation] Diagnosis for Delay Faults in the Presence of Clock Delays Considering Hazards (2015)
  • Author(s): Y. Higami, S. Wang, H. Takahashi, S. Kobayashi and K. K. Saluja
  • Organizer: International Technical Conference on Circuits/Systems, Computers and Communications
  • Place of Presentation: 韓国ソウル
  • Year and Date: 2015-06-30
  • Int'l Joint Research
• [Presentation] クロック信号線のブリッジ故障に対する遅延を考慮した故障診断 (2014)
  • Author(s): 細川優人，樋上喜信，王森レイ，高橋寛，小林真也
  • Organizer: 電気関係学会四国支部連合大会
  • Place of Presentation: 徳島大学
  • Year and Date: 2014-09-13
• [Presentation] マルチサイクルテストでの遷移故障に対するテスト生成 (2014)
  • Author(s): 藤原翼，樋上喜信，王森レイ，高橋寛，小林真也
  • Organizer: 電気関係学会四国支部連合大会
  • Place of Presentation: 徳島大学
  • Year and Date: 2014-09-13
• [Presentation] クロック信号線の遅延故障に対する故障診断用テスト生成
  • Author(s): 江口拓弥，樋上喜信，高橋寛，小林真也
  • Organizer: 電気関係学会四国支部連合大会
  • Place of Presentation: 徳島大学
• [Book] Three-Dimensional Integration of Semiconductors (2015)
  • Author(s): Kazuo Kondo, Morihiro Kada, Kenji Takahashi (Editors)
  • Total Pages: 401
  • Publisher: Springer