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Study on globally-convergent algorithms for solving large-scale integrated circuits and their practical application

Research Project

Project/Area Number 25420384
Research Category

Grant-in-Aid for Scientific Research (C)

Allocation TypeMulti-year Fund
Section一般
Research Field Communication/Network engineering
Research InstitutionChuo University

Principal Investigator

Yamamura Kiyotaka  中央大学, 理工学部, 教授 (30182603)

Project Period (FY) 2013-04-01 – 2018-03-31
Project Status Completed (Fiscal Year 2017)
Budget Amount *help
¥5,200,000 (Direct Cost: ¥4,000,000、Indirect Cost: ¥1,200,000)
Fiscal Year 2017: ¥1,040,000 (Direct Cost: ¥800,000、Indirect Cost: ¥240,000)
Fiscal Year 2016: ¥1,040,000 (Direct Cost: ¥800,000、Indirect Cost: ¥240,000)
Fiscal Year 2015: ¥1,040,000 (Direct Cost: ¥800,000、Indirect Cost: ¥240,000)
Fiscal Year 2014: ¥1,040,000 (Direct Cost: ¥800,000、Indirect Cost: ¥240,000)
Fiscal Year 2013: ¥1,040,000 (Direct Cost: ¥800,000、Indirect Cost: ¥240,000)
Keywords非線形理論・回路 / 非線形数値解析 / 大規模集積回路 / 回路シミュレーション / 数理計画法 / 全解探索 / 線形計画法 / 整数計画法 / ホモトピー法 / 整数計画ソルバー
Outline of Final Research Achievements

In this project, we developed efficient and practical globally-convergent algorithms for solving large-scale integrated circuits. We first proposed an efficient homotopy method for solving nonlinear circuits, and prove its global convergence property. By this method, bipolar analog integrated circuits with more than 20000 elements could be solved with the theoretical guarantee of global convergence. We next proposed an efficient algorithm for finding all solutions of nonlinear circuits using linear programming. By this algorithm, all solutions of large-scale systems where the number of variables is several thousands could be found in practical computation time. We further proposed an efficient method for finding all solutions of nonlinear circuits using integer programming. By this method, all solutions can be found easily without making complicated programs. Thus, we have developed various types of globally-convergent algorithms that are good at efficiency and practicality.

Report

(6 results)
  • 2017 Annual Research Report   Final Research Report ( PDF )
  • 2016 Research-status Report
  • 2015 Research-status Report
  • 2014 Research-status Report
  • 2013 Research-status Report
  • Research Products

    (66 results)

All 2017 2016 2015 2014 2013 2012

All Journal Article (32 results) (of which Peer Reviewed: 32 results,  Open Access: 1 results,  Acknowledgement Compliant: 3 results) Presentation (34 results) (of which Int'l Joint Research: 14 results,  Invited: 4 results)

  • [Journal Article] 可変利得ニュートン不動点ホモトピー法を用いた非線形回路の直流動作点解析2017

    • Author(s)
      山村清隆,伊藤麻美,篠原そのこ
    • Journal Title

      電子情報通信学会論文誌(A)

      Volume: J100-A Pages: 401-410

    • Related Report
      2017 Annual Research Report
    • Peer Reviewed
  • [Journal Article] Complete analysis of piecewise-linear resistive circuits using integer programming2017

    • Author(s)
      Kiyotaka Yamamura and Hiroki Takahara
    • Journal Title

      Proceedings of 23rd IEEE European Conference on Circuit Theory and Design

      Volume: 1 Pages: 1-1

    • DOI

      10.1109/ecctd.2017.8093298

    • NAID

      110009737142

    • Related Report
      2017 Annual Research Report
    • Peer Reviewed
  • [Journal Article] Finding all solution sets of piecewise-linear interval equations using integer programming2017

    • Author(s)
      Kiyotaka Yamamura and Ryota Watanabe
    • Journal Title

      Proceedings of 23rd IEEE European Conference on Circuit Theory and Design

      Volume: 1 Pages: 1-1

    • DOI

      10.1109/ecctd.2017.8093317

    • Related Report
      2017 Annual Research Report
    • Peer Reviewed
  • [Journal Article] Finding all solution sets of piecewise-linear interval equations using integer programming2017

    • Author(s)
      Kiyotaka Yamamura, Hiroki Takahara, and Yuichiro Takane
    • Journal Title

      Proceedings of 2017 IEEE Workshop on Nonlinear Circuit Networks

      Volume: 1 Pages: 78-81

    • Related Report
      2017 Annual Research Report
    • Peer Reviewed
  • [Journal Article] An efficient variable-gain homotopy method for finding DC operating points of transistor circuits2017

    • Author(s)
      Kiyotaka Yamamura and Takumi Shimada
    • Journal Title

      Proceedings of 2017 IEEE Workshop on Nonlinear Circuit Networks

      Volume: 1 Pages: 82-85

    • Related Report
      2017 Annual Research Report
    • Peer Reviewed
  • [Journal Article] 整数計画ソルバーを用いた区分的線形抵抗回路の完全解析2017

    • Author(s)
      高原弘樹,渡辺涼太,山村清隆
    • Journal Title

      第30回 回路とシステムワークショップ論文集

      Volume: 1 Pages: 243-248

    • NAID

      40021341555

    • Related Report
      2017 Annual Research Report
    • Peer Reviewed
  • [Journal Article] 整数計画ソルバーを用いた区分的線形抵抗回路の完全解析2017

    • Author(s)
      高原弘樹,渡辺涼太,山村清隆
    • Journal Title

      電子情報通信学会 第30回 回路とシステムワークショップ論文集

      Volume: 1 Pages: 243-248

    • NAID

      40021341555

    • Related Report
      2016 Research-status Report
    • Peer Reviewed
  • [Journal Article] Finding all solution sets of piecewise-linear interval equations using integer programming2016

    • Author(s)
      Kiyotaka Yamamura and Suguru Ishiguro
    • Journal Title

      Reliable Computing

      Volume: 23 Pages: 73-96

    • Related Report
      2016 Research-status Report 2015 Research-status Report
    • Peer Reviewed / Open Access
  • [Journal Article] A simple method for finding all characteristic curves of piecewise-linear resistive circuits using an integer programming solver2016

    • Author(s)
      Kiyotaka Yamamura and Ryota Watanabe
    • Journal Title

      Proceedings of 2016 IEEE Asia Pacific Conference on Circuits and Systems

      Volume: 1 Pages: 224-227

    • DOI

      10.1109/apccas.2016.7803939

    • NAID

      40021341379

    • Related Report
      2016 Research-status Report
    • Peer Reviewed
  • [Journal Article] Finding all solutions of piecewise-linear resistive circuits using Excel2016

    • Author(s)
      Kiyotaka Yamamura and Daiki Koyama
    • Journal Title

      Proceedings of 2016 IEEE Asia Pacific Conference on Circuits and Systems

      Volume: 1 Pages: 228-231

    • DOI

      10.1109/apccas.2016.7803940

    • Related Report
      2016 Research-status Report
    • Peer Reviewed
  • [Journal Article] A modified predictor-corrector method for tracing solution curves2016

    • Author(s)
      Kiyotaka Yamamura and Kiyoshi Adachi
    • Journal Title

      Proceedings of 2016 IEEE Asia Pacific Conference on Circuits and Systems

      Volume: 1 Pages: 372-375

    • DOI

      10.1109/apccas.2016.7803979

    • Related Report
      2016 Research-status Report
    • Peer Reviewed
  • [Journal Article] Complete analysis of piecewise-linear resistive circuits using integer programming2016

    • Author(s)
      Kiyotaka Yamamura, Ryota Watanabe, and Hiroki Takahara
    • Journal Title

      Proceedings of 2016 IEEE Workshop on Nonlinear Circuit Networks

      Volume: 1 Pages: 24-27

    • NAID

      110009737142

    • Related Report
      2016 Research-status Report
    • Peer Reviewed
  • [Journal Article] Finding all solution sets of piecewise-linear interval equations using integer programming2016

    • Author(s)
      Kiyotaka Yamamura, Daiki Koyama, and Shintaro Sato
    • Journal Title

      Proceedings of 2016 IEEE Workshop on Nonlinear Circuit Networks

      Volume: 1 Pages: 28-31

    • Related Report
      2016 Research-status Report
    • Peer Reviewed
  • [Journal Article] 整数計画ソルバーを用いた区分的線形抵抗回路の全ての特性曲線を求める簡単な方法2016

    • Author(s)
      山村清隆,石黒 俊
    • Journal Title

      電子情報通信学会 第29回 回路とシステムワークショップ論文集

      Volume: 1 Pages: 267-272

    • NAID

      40021341379

    • Related Report
      2016 Research-status Report 2015 Research-status Report
    • Peer Reviewed
  • [Journal Article] Characteristic Analysis and Tolerance Analysis of Nonlinear Resistive Circuits Using Integer Programming2016

    • Author(s)
      Kiyotaka Yamamura, Suguru Ishiguro, and Hiroshi Taki
    • Journal Title

      IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences

      Volume: E99.A Issue: 3 Pages: 710-719

    • DOI

      10.1587/transfun.E99.A.710

    • NAID

      130005131286

    • ISSN
      0916-8508, 1745-1337
    • Related Report
      2015 Research-status Report
    • Peer Reviewed / Acknowledgement Compliant
  • [Journal Article] A trapezoidal method for solving differential algebraic equations2015

    • Author(s)
      Junjie Huang, Qiang Li, Kiyotaka Yamamura, and Yasuaki Inoue
    • Journal Title

      Proceedings of International Technical Conference on Circuits/Systems, Computers and Communications

      Volume: 1 Pages: 752-755

    • Related Report
      2015 Research-status Report
    • Peer Reviewed
  • [Journal Article] Finding all DC solutions of nonlinear circuits using parallelogram LP test2015

    • Author(s)
      Kiyotaka Yamamura and Suguru Ishiguro
    • Journal Title

      Proceedings of 2015 IEEE European Conference on Circuit Theory and Design

      Volume: 1 Pages: 1-4

    • DOI

      10.1109/ecctd.2015.7300124

    • Related Report
      2015 Research-status Report
    • Peer Reviewed
  • [Journal Article] Complete analysis of piecewise-linear resistive circuits using CPLEX2015

    • Author(s)
      Taiki Okamoto, Suguru Ishiguro, and Kiyotaka Yamamura
    • Journal Title

      Proceedings of 2015 IEEE Workshop on Nonlinear Circuit Networks

      Volume: 1 Pages: 30-33

    • Related Report
      2015 Research-status Report
    • Peer Reviewed
  • [Journal Article] Characteristic analysis of piecewise-linear resistive circuits using SCIP2015

    • Author(s)
      Tetsuya Shiraishi, Suguru Ishiguro, and Kiyotaka Yamamura
    • Journal Title

      Proceedings of 2015 IEEE Workshop on Nonlinear Circuit Networks

      Volume: 1 Pages: 34-37

    • Related Report
      2015 Research-status Report
    • Peer Reviewed
  • [Journal Article] Finding all solutions of piecewise-linear resistive circuits using Excel2015

    • Author(s)
      Daiki Koyama and Kiyotaka Yamamura
    • Journal Title

      Proceedings of 2015 IEEE Workshop on Nonlinear Circuit Networks

      Volume: 1 Pages: 38-41

    • Related Report
      2015 Research-status Report
    • Peer Reviewed
  • [Journal Article] 平行四辺形LPテストを用いた非線形回路の全解探索法2015

    • Author(s)
      石黒 俊, 高宮将弘, 山村清隆
    • Journal Title

      電子情報通信学会 第28回 回路とシステムワークショップ論文集

      Volume: 1 Pages: 172-177

    • NAID

      40020806835

    • Related Report
      2015 Research-status Report
    • Peer Reviewed
  • [Journal Article] Finding All Solutions of Piecewise-Linear Resistive Circuits Using Separable Programming2014

    • Author(s)
      Kiyotaka Yamamura and Hideki Tanaka
    • Journal Title

      IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences

      Volume: E97.A Issue: 5 Pages: 1037-1041

    • DOI

      10.1587/transfun.E97.A.1037

    • NAID

      130004770825

    • ISSN
      0916-8508, 1745-1337
    • Related Report
      2014 Research-status Report 2013 Research-status Report
    • Peer Reviewed / Acknowledgement Compliant
  • [Journal Article] DC Operating Point Analysis of Transistor Circuits Using the Variable-Gain Homotopy Method2014

    • Author(s)
      Kiyotaka Yamamura and Takuya Miyamoto
    • Journal Title

      IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences

      Volume: E97.A Issue: 5 Pages: 1042-1050

    • DOI

      10.1587/transfun.E97.A.1042

    • NAID

      130004770826

    • ISSN
      0916-8508, 1745-1337
    • Related Report
      2014 Research-status Report 2013 Research-status Report
    • Peer Reviewed / Acknowledgement Compliant
  • [Journal Article] Characteristic analysis and tolerance analysis of nonlinear resistive circuits using integer programming2014

    • Author(s)
      Kiyotaka Yamamura and Hiroshi Taki
    • Journal Title

      Proceedings of 2014 IEEE Asia Pacific Conference on Circuits and Systems

      Volume: 1 Pages: 254-259

    • DOI

      10.1109/apccas.2014.7032891

    • NAID

      130005131286

    • Related Report
      2014 Research-status Report
    • Peer Reviewed
  • [Journal Article] Statistical tolerance analysis of nonlinear circuits using integer programming and set-valued functions with probability distribution2014

    • Author(s)
      Suguru Ishiguro, Daiki Koyama, and Kiyotaka Yamamura
    • Journal Title

      Proceedings of 2014 IEEE Workshop on Nonlinear Circuit Networks

      Volume: 1 Pages: 14-17

    • Related Report
      2014 Research-status Report
    • Peer Reviewed
  • [Journal Article] 整数計画法を用いた非線形抵抗回路の特性解析と変動解析2014

    • Author(s)
      石黒俊,滝裕至,山村清隆
    • Journal Title

      電子情報通信学会 第27回 回路とシステムワークショップ論文集

      Volume: 1 Pages: 318-323

    • NAID

      40020153499

    • Related Report
      2014 Research-status Report
    • Peer Reviewed
  • [Journal Article] 一般化線形相補性理論と整数計画法を用いた区分的線形抵抗回路の完全解析2014

    • Author(s)
      山村清隆,前田礼維,加藤弘之
    • Journal Title

      電子情報通信学会論文誌(A)

      Volume: J97-A Pages: 150-159

    • NAID

      110009798916

    • Related Report
      2013 Research-status Report
    • Peer Reviewed
  • [Journal Article] Finding all solutions of piecewise-linear resistive circuits using separable programming2013

    • Author(s)
      Kiyotaka Yamamura and Hideki Tanaka
    • Journal Title

      Proceedings of 21th IEEE European Conference on Circuit Theory and Design

      Volume: 1 Pages: 28-28

    • DOI

      10.1109/ecctd.2013.6662275

    • NAID

      130004770825

    • Related Report
      2013 Research-status Report
    • Peer Reviewed
  • [Journal Article] An algorithm for finding all DC solutions of nonlinear circuits using polygonal LP test2013

    • Author(s)
      Eisuke Yukawa, Hiroshi Taki, Shota Kinami, and Kiyotaka Yammaura
    • Journal Title

      Proceedings of 2013 IEEE Workshop on Nonlinear Circuit Networks

      Volume: 1 Pages: 51-54

    • Related Report
      2013 Research-status Report
    • Peer Reviewed
  • [Journal Article] Complete analysis of piecewise-linear resistive circuits using the generalized linear complementarity theory and integer programming2013

    • Author(s)
      Kiyotaka Yamamura
    • Journal Title

      Proceedings of 2013 IEEE Workshop on Nonlinear Circuit Networks

      Volume: 1 Pages: 57-60

    • NAID

      110009798916

    • Related Report
      2013 Research-status Report
    • Peer Reviewed
  • [Journal Article] An efficient variable-gain homotopy method for DC operating point analysis of transistor circuits2013

    • Author(s)
      Fumiya Okimori, Yudai Yamamoto, Takuya Miyamoto, and Kiyotaka Yamamura
    • Journal Title

      第26回 回路とシステムワークショップ論文集

      Volume: 1 Pages: 391-396

    • Related Report
      2013 Research-status Report
    • Peer Reviewed
  • [Journal Article] Formulating hybrid equations and state equations for nonlinear circuits using SPICE2012

    • Author(s)
      Kiyotaka Yamamura
    • Journal Title

      International Journal of Circuit Theory and Applications

      Volume: (掲載決定) Issue: 1 Pages: 101-110

    • DOI

      10.1002/cta.788

    • Related Report
      2013 Research-status Report
    • Peer Reviewed
  • [Presentation] 整数計画ソルバーを用いた区分的線形抵抗回路の完全解析2017

    • Author(s)
      高原弘樹,渡辺涼太,山村清隆
    • Organizer
      電子情報通信学会 第30回 回路とシステムワークショップ
    • Place of Presentation
      福岡、日本
    • Year and Date
      2017-05-11
    • Related Report
      2016 Research-status Report
  • [Presentation] Complete analysis of piecewise-linear resistive circuits using integer programming2017

    • Author(s)
      Kiyotaka Yamamura and Hiroki Takahara
    • Organizer
      23rd IEEE European Conference on Circuit Theory and Design
    • Related Report
      2017 Annual Research Report
    • Int'l Joint Research
  • [Presentation] Finding all solution sets of piecewise-linear interval equations using integer programming2017

    • Author(s)
      Kiyotaka Yamamura and Ryota Watanabe
    • Organizer
      23rd IEEE European Conference on Circuit Theory and Design
    • Related Report
      2017 Annual Research Report
    • Int'l Joint Research
  • [Presentation] Finding all solution sets of piecewise-linear interval equations using integer programming2017

    • Author(s)
      Kiyotaka Yamamura, Hiroki Takahara, and Yuichiro Takane
    • Organizer
      2017 IEEE Workshop on Nonlinear Circuit Networks
    • Related Report
      2017 Annual Research Report
    • Int'l Joint Research
  • [Presentation] An efficient variable-gain homotopy method for finding DC operating points of transistor circuits2017

    • Author(s)
      Kiyotaka Yamamura and Takumi Shimada
    • Organizer
      2017 IEEE Workshop on Nonlinear Circuit Networks
    • Related Report
      2017 Annual Research Report
    • Int'l Joint Research
  • [Presentation] 整数計画ソルバーを用いた区分的線形抵抗回路の完全解析2017

    • Author(s)
      高原弘樹,渡辺涼太,山村清隆
    • Organizer
      電子情報通信学会 第30回 回路とシステムワークショップ論文集
    • Related Report
      2017 Annual Research Report
  • [Presentation] 整数計画法を用いた区分的線形抵抗回路の完全解析2017

    • Author(s)
      渡辺涼太,高原弘樹,山村清隆
    • Organizer
      電子情報通信学会非線形問題研究会
    • Related Report
      2017 Annual Research Report
  • [Presentation] Complete analysis of piecewise-linear resistive circuits using integer programming2016

    • Author(s)
      Kiyotaka Yamamura, Ryota Watanabe, and Hiroki Takahara
    • Organizer
      2016 IEEE Workshop on Nonlinear Circuit Networks
    • Place of Presentation
      Tokushima, Japan
    • Year and Date
      2016-12-09
    • Related Report
      2016 Research-status Report
    • Int'l Joint Research
  • [Presentation] Finding all solution sets of piecewise-linear interval equations using integer programming2016

    • Author(s)
      Kiyotaka Yamamura, Daiki Koyama, and Shintaro Sato
    • Organizer
      2016 IEEE Workshop on Nonlinear Circuit Networks
    • Place of Presentation
      Tokushima, Japan
    • Year and Date
      2016-12-09
    • Related Report
      2016 Research-status Report
    • Int'l Joint Research
  • [Presentation] 直角三角形LPテストを用いた非線形回路の全解探索法2016

    • Author(s)
      寺谷和輝,山村清隆
    • Organizer
      電子情報通信学会非線形問題研究会
    • Place of Presentation
      東京、日本
    • Year and Date
      2016-10-27
    • Related Report
      2016 Research-status Report
  • [Presentation] A simple method for finding all characteristic curves of piecewise-linear resistive circuits using an integer programming solver2016

    • Author(s)
      Kiyotaka Yamamura and Ryota Watanabe
    • Organizer
      2016 IEEE Asia Pacific Conference on Circuits and Systems
    • Place of Presentation
      Jeju, Korea
    • Year and Date
      2016-10-25
    • Related Report
      2016 Research-status Report
    • Int'l Joint Research / Invited
  • [Presentation] Finding all solutions of piecewise-linear resistive circuits using Excel2016

    • Author(s)
      Kiyotaka Yamamura and Daiki Koyama
    • Organizer
      2016 IEEE Asia Pacific Conference on Circuits and Systems
    • Place of Presentation
      Jeju, Korea
    • Year and Date
      2016-10-25
    • Related Report
      2016 Research-status Report
    • Int'l Joint Research / Invited
  • [Presentation] A modified predictor-corrector method for tracing solution curves2016

    • Author(s)
      Kiyotaka Yamamura and Kiyoshi Adachi
    • Organizer
      2016 IEEE Asia Pacific Conference on Circuits and Systems
    • Place of Presentation
      Jeju, Korea
    • Year and Date
      2016-10-25
    • Related Report
      2016 Research-status Report
    • Int'l Joint Research
  • [Presentation] 整数計画ソルバーを用いた区分的線形抵抗回路の全ての特性曲線を求める簡単な方法2016

    • Author(s)
      山村清隆,石黒 俊
    • Organizer
      電子情報通信学会 第29回 回路とシステムワークショップ
    • Place of Presentation
      福岡、日本
    • Year and Date
      2016-05-12
    • Related Report
      2016 Research-status Report
  • [Presentation] 整数計画ソルバーを用いた区分的線形抵抗回路の全ての特性曲線を求める簡単な方法2016

    • Author(s)
      山村清隆,石黒 俊
    • Organizer
      電子情報通信学会 整数計画ソルバーを用いた区分的線形抵抗回路の全ての特性曲線を求める簡単な方法
    • Place of Presentation
      福岡,日本
    • Year and Date
      2016-05-12
    • Related Report
      2015 Research-status Report
  • [Presentation] 他の解曲線への乗り移り問題を改善した予測子修正子法2016

    • Author(s)
      木下誉章,足立聖,山村清隆
    • Organizer
      2016年電子情報通信学会総合大会
    • Place of Presentation
      福岡,日本
    • Year and Date
      2016-03-15
    • Related Report
      2015 Research-status Report
  • [Presentation] Complete analysis of piecewise-linear resistive circuits using CPLEX2015

    • Author(s)
      Taiki Okamoto, Suguru Ishiguro, and Kiyotaka Yamamura
    • Organizer
      2015 IEEE Workshop on Nonlinear Circuit Networks
    • Place of Presentation
      徳島,日本
    • Year and Date
      2015-12-11
    • Related Report
      2015 Research-status Report
    • Int'l Joint Research
  • [Presentation] Characteristic analysis of piecewise-linear resistive circuits using SCIP2015

    • Author(s)
      Tetsuya Shiraishi, Suguru Ishiguro, and Kiyotaka Yamamura
    • Organizer
      2015 IEEE Workshop on Nonlinear Circuit Networks
    • Place of Presentation
      徳島,日本
    • Year and Date
      2015-12-11
    • Related Report
      2015 Research-status Report
    • Int'l Joint Research
  • [Presentation] Finding all solutions of piecewise-linear resistive circuits using Excel2015

    • Author(s)
      Daiki Koyama and Kiyotaka Yamamura
    • Organizer
      2015 IEEE Workshop on Nonlinear Circuit Networks
    • Place of Presentation
      徳島,日本
    • Year and Date
      2015-12-11
    • Related Report
      2015 Research-status Report
    • Int'l Joint Research
  • [Presentation] Excelを用いた区分的線形回路の全解探索2015

    • Author(s)
      小山大輝,石黒俊,山村清隆
    • Organizer
      2015年電子情報通信学会ソサイエティ大会
    • Place of Presentation
      仙台,日本
    • Year and Date
      2015-09-08
    • Related Report
      2015 Research-status Report
  • [Presentation] Finding all DC solutions of nonlinear circuits using parallelogram LP test2015

    • Author(s)
      Kiyotaka Yamamura and Suguru Ishiguro
    • Organizer
      2015 IEEE European Conference on Circuit Theory and Design
    • Place of Presentation
      Trondheim, Norway
    • Year and Date
      2015-08-24
    • Related Report
      2015 Research-status Report
    • Int'l Joint Research
  • [Presentation] 平行四辺形LPテストを用いた非線形回路の全解探索法2015

    • Author(s)
      石黒 俊, 高宮将弘,山村清隆
    • Organizer
      電子情報通信学会 第28回 回路とシステムワークショップ
    • Place of Presentation
      淡路島,日本
    • Year and Date
      2015-08-03
    • Related Report
      2015 Research-status Report
  • [Presentation] A trapezoidal method for solving differential algebraic equations2015

    • Author(s)
      Junjie Huang, Qiang Li, Kiyotaka Yamamura, and Yasuaki Inoue
    • Organizer
      International Technical Conference on Circuits/Systems, Computers and Communications
    • Place of Presentation
      Seoul, Korea
    • Year and Date
      2015-06-29
    • Related Report
      2015 Research-status Report
    • Int'l Joint Research
  • [Presentation] 整数計画法を用いた非線形回路の混合方程式及び状態方程式の導出2015

    • Author(s)
      岡本大輝,滝裕至,山村清隆
    • Organizer
      2015年電子情報通信学会総合大会
    • Place of Presentation
      滋賀、日本
    • Year and Date
      2015-03-10 – 2015-03-13
    • Related Report
      2014 Research-status Report
  • [Presentation] Statistical tolerance analysis of nonlinear circuits using integer programming and set-valued functions with probability distribution2014

    • Author(s)
      Suguru Ishiguro, Daiki Koyama, and Kiyotaka Yamamura
    • Organizer
      2014 IEEE Workshop on Nonlinear Circuit Networks
    • Place of Presentation
      徳島、日本
    • Year and Date
      2014-12-12 – 2014-12-13
    • Related Report
      2014 Research-status Report
  • [Presentation] Characteristic analysis and tolerance analysis of nonlinear resistive circuits using integer programming2014

    • Author(s)
      Kiyotaka Yamamura and Hiroshi Taki
    • Organizer
      2014 IEEE Asia Pacific Conference on Circuits and Systems
    • Place of Presentation
      石垣島、日本
    • Year and Date
      2014-11-17 – 2014-11-20
    • Related Report
      2014 Research-status Report
  • [Presentation] 整数計画法を用いた非線形抵抗回路の特性解析と変動解析2014

    • Author(s)
      石黒俊,滝裕至,山村清隆
    • Organizer
      電子情報通信学会 第27回 回路とシステムワークショップ
    • Place of Presentation
      淡路島、日本
    • Year and Date
      2014-08-04 – 2014-08-05
    • Related Report
      2014 Research-status Report
  • [Presentation] 可変利得ニュートン不動点ホモトピー法を用いた非線形回路の直流動作点解析2014

    • Author(s)
      森山慶一,山村清隆
    • Organizer
      電子情報通信学会非線形問題研究会
    • Place of Presentation
      北海道、日本
    • Year and Date
      2014-07-21 – 2014-07-22
    • Related Report
      2014 Research-status Report
  • [Presentation] Finding all solutions of piecewise-linear resistive circuits using separable programming2013

    • Author(s)
      Kiyotaka Yamamura and Hideki Tanaka
    • Organizer
      21th IEEE European Conference on Circuit Theory and Design
    • Place of Presentation
      Dresden, Germany
    • Related Report
      2013 Research-status Report
    • Invited
  • [Presentation] An algorithm for finding all DC solutions of nonlinear circuits using polygonal LP test2013

    • Author(s)
      Eisuke Yukawa, Hiroshi Taki, Shota Kinami, and Kiyotaka Yammaura
    • Organizer
      2013 IEEE Workshop on Nonlinear Circuit Networks
    • Place of Presentation
      徳島、日本
    • Related Report
      2013 Research-status Report
  • [Presentation] Complete analysis of piecewise-linear resistive circuits using the generalized linear complementarity theory and integer programming2013

    • Author(s)
      Kiyotaka Yamamura
    • Organizer
      2013 IEEE Workshop on Nonlinear Circuit Networks
    • Place of Presentation
      徳島、日本
    • Related Report
      2013 Research-status Report
    • Invited
  • [Presentation] 整数計画法を用いた区分的線形抵抗回路の完全解析2013

    • Author(s)
      高木謙吾,滝裕至,前田礼維,山村清隆
    • Organizer
      2013年電子情報通信学会ソサイエティ大会
    • Place of Presentation
      福岡、日本
    • Related Report
      2013 Research-status Report
  • [Presentation] 多角形LPテストを用いた非線形回路の全解探索法2013

    • Author(s)
      木南翔太,山村清隆
    • Organizer
      2013年電子情報通信学会ソサイエティ大会
    • Place of Presentation
      福岡、日本
    • Related Report
      2013 Research-status Report
  • [Presentation] An efficient variable-gain homotopy method for DC operating point analysis of transistor circuits2013

    • Author(s)
      Fumiya Okimori, Yudai Yamamoto, Takuya Miyamoto, and Kiyotaka Yamamura
    • Organizer
      第26回 回路とシステムワークショップ
    • Place of Presentation
      淡路島、日本
    • Related Report
      2013 Research-status Report

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Published: 2014-07-25   Modified: 2019-07-29  

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