A high-density analog frontend array for neural interfaces
| Project/Area Number |
25820141
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| Research Category |
Grant-in-Aid for Young Scientists (B)
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| Allocation Type | Multi-year Fund |
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| Research Field |
Electron device/Electronic equipment
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| Research Institution | Toyohashi University of Technology |
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Principal Investigator |
AKITA Ippei 豊橋技術科学大学, 工学(系)研究科(研究院), 助教 (10612385)
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| Project Period (FY) |
2013-04-01 – 2015-03-31
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| Project Status |
Completed (Fiscal Year 2014)
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| Budget Amount *help |
¥4,290,000 (Direct Cost: ¥3,300,000、Indirect Cost: ¥990,000)
Fiscal Year 2014: ¥2,080,000 (Direct Cost: ¥1,600,000、Indirect Cost: ¥480,000)
Fiscal Year 2013: ¥2,210,000 (Direct Cost: ¥1,700,000、Indirect Cost: ¥510,000)
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| Keywords | アナログ / オペアンプ / AD変換器 / 低消費電力化 / 小型化 / アナログ集積回路 / アンプ |
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| Outline of Final Research Achievements |
Development of implantable neural interface devices is necessary to realize Brain-Machine Interface (BMI) systems, which are expected to enhance human's quality of life (QoL). This study is aimed at designing such devices with ultra-low power operation and small chip area for arrayed analog front-ends (AFEs), and a novel digital calibration scheme has been proposed. This technique can provide high-accuracy characteristic of AFEs, such as neural amplifiers or analog-to-digital converters (ADCs), without paying additional power and die area, and its effectiveness is confirmed through fabrication and evaluation of prototype chips in silicon CMOS technology. Furthermore, based on above techniques, an arrayed AFE LSI has been also designed and fabricated and these results will enable future multi-channel fully-implantable neural interface devices.
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Report
(3 results)
Research Products
(19 results)
