Design of a nonvolatile FPGA with system self-recovery function
| Project/Area Number |
25870067
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| Research Category |
Grant-in-Aid for Young Scientists (B)
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| Allocation Type | Multi-year Fund |
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| Research Field |
Computer system
Electron device/Electronic equipment
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| Research Institution | Tohoku University |
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Principal Investigator |
Suzuki Daisuke 東北大学, 学際科学フロンティア研究所, 助教 (00574675)
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| Project Period (FY) |
2013-04-01 – 2016-03-31
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| Project Status |
Completed (Fiscal Year 2015)
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| Budget Amount *help |
¥4,160,000 (Direct Cost: ¥3,200,000、Indirect Cost: ¥960,000)
Fiscal Year 2015: ¥1,300,000 (Direct Cost: ¥1,000,000、Indirect Cost: ¥300,000)
Fiscal Year 2014: ¥1,690,000 (Direct Cost: ¥1,300,000、Indirect Cost: ¥390,000)
Fiscal Year 2013: ¥1,170,000 (Direct Cost: ¥900,000、Indirect Cost: ¥270,000)
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| Keywords | FPGA / 不揮発ロジック / MTJ素子 / 低消費電力 / ロジックインメモリ / 耐災害性 / 高信頼 / 計算機アーキテクチャ / ロジックインメモリ回路 / VLSI / スピントロニクス |
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| Outline of Final Research Achievements |
The mission of the research is to realize a nonvolatile field-programmable gate array (FPGA) with robustness against power failure due to natural disaster. To perform the mission, we have designed energy-efficient nonvolatile FPGA circuit IPs by using magnetic tunnel junction (MTJ) devices. We have also realized a self-terminated mechanism which makes it possible to realize successful write in the MTJ device. By embedding these circuit IPs into an open-source CAD tool Verilog-to-Routing (VTR), we have realized the nonvolatile FPGA with self-recovery function and established its design environment.
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Report
(4 results)
Research Products
(19 results)
