| Budget Amount *help |
¥41,470,000 (Direct Cost: ¥31,900,000、Indirect Cost: ¥9,570,000)
Fiscal Year 2016: ¥10,790,000 (Direct Cost: ¥8,300,000、Indirect Cost: ¥2,490,000)
Fiscal Year 2015: ¥13,000,000 (Direct Cost: ¥10,000,000、Indirect Cost: ¥3,000,000)
Fiscal Year 2014: ¥17,680,000 (Direct Cost: ¥13,600,000、Indirect Cost: ¥4,080,000)
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| Outline of Final Research Achievements |
We have proposed and demonstrated a novel fabrication process including re-bonding GOI substrates to Si substrates for improving the GOI back interface quality and have succeeded in operation of 2-nm-thick GOI MOSFETs by a digital thinning process. It has been clarified through temperature dependence of mobility that mobility degradation of GOI MOSFETs with thinning GOI is attributable to thickness fluctuation scattering. We have modified the Ge condensation process by insertion of annealing steps, continuous thermal processes without any cooling and much longer cooing time, resulting in formation of GOI films with high compressive strain. Combined with the digital thinning process, we have succeeded in 4.5-nm-thick strained GOI MOSFETs with high mobility characteristics.
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