A Research on High-Speed Embedded DSP based on PSO
Project/Area Number |
26280017
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Research Category |
Grant-in-Aid for Scientific Research (B)
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Allocation Type | Partial Multi-year Fund |
Section | 一般 |
Research Field |
Computer system
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Research Institution | Waseda University |
Principal Investigator |
Baba Takaaki 早稲田大学, 理工学術院, 教授 (30367172)
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Project Period (FY) |
2014-04-01 – 2017-03-31
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Project Status |
Completed (Fiscal Year 2016)
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Budget Amount *help |
¥16,900,000 (Direct Cost: ¥13,000,000、Indirect Cost: ¥3,900,000)
Fiscal Year 2016: ¥7,670,000 (Direct Cost: ¥5,900,000、Indirect Cost: ¥1,770,000)
Fiscal Year 2015: ¥3,900,000 (Direct Cost: ¥3,000,000、Indirect Cost: ¥900,000)
Fiscal Year 2014: ¥5,330,000 (Direct Cost: ¥4,100,000、Indirect Cost: ¥1,230,000)
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Keywords | 粒子群最適化 / 計算機システム / 信号処理 / 群知能 |
Outline of Final Research Achievements |
A high-speed PSO (Particle Swarm Optimization) hardware engine is proposed in this research. The proposed PSO hardware engine have tree distinctive features which are adaptive particle calculation block (APCB),pipeline fitness calculation engine (PFCE) and asynchronous control unit (ACU). The APCB can selectively switch the multiple PSO algorithms based on the convergence statues. The PFCE adopts a proposed sub-processor to reduce the calculation time with pipeline technology. The ACU can drastically improve the performance of each module for reducing the unnecessary waiting time. As the result, the proposed hardware engine can achieve 10 times processing speed compared the conventional approach.
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Report
(4 results)
Research Products
(29 results)
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[Presentation] A Decoding Method of AMSPSO for CVRPPD2016
Author(s)
Q. Liang, Y.-T. Liao, K.-T. Chen and T. Baba
Organizer
2016 RISP International Workshop on Nonlinear Circuits and Signal Processing (NCSP 2016)
Place of Presentation
Hawaii, USA
Year and Date
2016-03-06
Related Report
Int'l Joint Research
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