Development of a data stream management system using special hardware assistance

• Project/Area Number: 26330061
• Research Category: Grant-in-Aid for Scientific Research (C)
• Allocation Type: Multi-year Fund
• Section: 一般
• Research Field: Computer system
• Research Institution: The University of Electro-Communications
• Principal Investigator: Yoshinaga Tsutomu 電気通信大学, 大学院情報理工学研究科, 教授 (60210738)
• Co-Investigator(Kenkyū-buntansha): 吉見 真聡 電気通信大学, 大学院情報理工学研究科, 助教 (00548000)
• Project Period (FY): 2014-04-01 – 2017-03-31
• Project Status: Completed (Fiscal Year 2016)
• Budget Amount: ¥4,810,000 (Direct Cost: ¥3,700,000、Indirect Cost: ¥1,110,000); Fiscal Year 2016: ¥1,170,000 (Direct Cost: ¥900,000、Indirect Cost: ¥270,000); Fiscal Year 2015: ¥1,430,000 (Direct Cost: ¥1,100,000、Indirect Cost: ¥330,000); Fiscal Year 2014: ¥2,210,000 (Direct Cost: ¥1,700,000、Indirect Cost: ¥510,000)
• Keywords: データストリーム処理 / リコンフィギャラブル計算 / FPGA / 専用ハードウェア / 結合演算 / 集約演算 / スライディングウィンドウ / ストリームデータ処理 / データストリーム管理システム / 動的再構成

Outline of Final Research Achievements

We designed special hardware modules which accelerate aggregation and join operations for stream data process in big data analytics. We also developed a query compiler which generates configuration information for FPGAs from SQL-based query plans as well as distributed system software to utilize a PC cluster with interconnected FPGAs.
We have obtained approximately 9.2 times faster join throughput and 58.8 times performance per energy, compared to conventional software-based join operation, on an FPGA-enhanced 4-node PC cluster when a sliding window size is 4096 tuples per node.

Research Products

• [Journal Article] Pipelined Parallel Join and Its FPGA-Based Acceleration (2017)
  • Author(s): Masato YOSHIMI, Yasin OGE, and Tsutomu YOSHINAGA
  • Journal Title: ACM Transactions on Embedded Computing System Volume: 印刷中
  • Peer Reviewed / Acknowledgement Compliant
• [Journal Article] An Implementation of Cloud Environment with Adaptive Computing Resource Sharing (2015)
  • Author(s): 中島拓真， 吉見真聡， 入江英嗣， 吉永努
  • Journal Title: 電子情報通信学会論文誌D 情報・システム Volume: J98-D Issue: 8 Pages: 1142-1150
  • DOI: 10.14923/transinfj.2014JDP7123
  • ISSN: 1880-4535, 1881-0225
  • Year and Date: 2015-08-01
  • Peer Reviewed
• [Journal Article] Design and Evaluation of a Configurable Query Processing Hardware for Data Streams (2015)
  • Author(s): Yasin OGE, Masato YOSHIMI, Takefumi MIYOSHI, Hideyuki KAWASHIMA, Hidetsugu IRIE, and Tsutomu YOSHINAGA
  • Journal Title: IEICE Transactions on Information and Systems Volume: E98.D Issue: 12 Pages: 2207-2217
  • DOI: 10.1587/transinf.2015EDP7203
  • NAID: 130005112325
  • ISSN: 0916-8532, 1745-1361
  • Peer Reviewed / Acknowledgement Compliant
• [Presentation] マルチノードFPGAによるストリームデータ分散結合処理 (2017)
  • Author(s): 多田昂介・川原尚人・吉見真聡・策力木格・吉永 努
  • Organizer: 電子情報通信学会，信学技法CPSY2016-112
  • Place of Presentation: 慶応大（神奈川県・横浜市）
  • Year and Date: 2017-01-23
• [Presentation] Accelerating BLAST Computation on an FPGA-enhanced PC Cluster (2016)
  • Author(s): Masato Yoshimi, Yasin Oge, Celimuge Wu and Tsutomu Yoshinaga
  • Organizer: Proc. of the Fourth International Symposium on Computing and Networking (CANDAR 2016)
  • Place of Presentation: Hiroshima Univ. (Hiroshima Prefecture, Higashi-hiroshima city))
  • Year and Date: 2016-11-22
  • Int'l Joint Research
• [Presentation] ネットワーク結合型マルチFPGAボードを用いた集約演算クエリ処理 (2016)
  • Author(s): 川原尚人・吉見真聡・策力木格・吉永努
  • Organizer: 電子情報通信学会，信学技法CPSY2016-49
  • Place of Presentation: 幕張メッセ（千葉県・千葉市）
  • Year and Date: 2016-10-06
• [Presentation] Design and Evaluation of Low-Latency Handshake Join on FPGA (2016)
  • Author(s): Masato YOSHIMI, Yasin OGE, Celimuge Wu, and Tsutomu YOSHINAGA
  • Organizer: IEICE, Tech. Report, CPSY2015-155
  • Place of Presentation: Nagasaki
  • Year and Date: 2016-03-25
• [Presentation] データストリーム集約演算HWの並列化 (2016)
  • Author(s): 小川芳光，オゲヤースィン，吉見真聡，策力木格，吉永努
  • Organizer: 信学技法 CPSY2015-119
  • Place of Presentation: Yokohama
  • Year and Date: 2016-01-19
• [Presentation] 複数FPGAボードを用いたビッグデータ分割処理の高速化 (2015)
  • Author(s): 工藤 龍・須戸里織・オゲ ヤースィン・寺田祐太・吉見真聡・入江英嗣・吉永 努
  • Organizer: 電子情報通信学会CPSY研究会／信学技法CPSY2014-152
  • Place of Presentation: 横浜
  • Year and Date: 2015-01-29 – 2015-01-30
• [Presentation] Accelerating OLAP workload on interconnected FPGAs with Flash storage (2014)
  • Author(s): Masato Yoshimi, Ryu Kudo, Yasin Oge, Yuta Terada, Hidetsugu Irie, and Tsutomu Yoshinaga
  • Organizer: Proc. of the 2nd International Workshop on Computer Systems and Architectures (CSA'14)
  • Place of Presentation: 静岡
  • Year and Date: 2014-12-10 – 2014-12-12
• [Presentation] An FPGA-based Tightly Coupled Accelerator for Data-Intensive Applications (2014)
  • Author(s): Masato Yoshimi, Ryu Kudo, Yasin Oge, Yuta Terada, Hidetsugu Irie, Tsutomu Yoshinaga
  • Organizer: Proc. of the 2014 IEEE 8th International Symposium on Embedded Multicore/Manycore SoCs (MCSoC)
  • Place of Presentation: Aizu
  • Year and Date: 2014-09-23 – 2014-09-25
• [Patent(Industrial Property Rights)] データ処理装置およびデータ処理方法，並びにプログラム (2014)
  • Inventor(s): オゲヤースィン，吉見真聡，入江英嗣，吉永努
  • Industrial Property Rights Holder: オゲヤースィン，吉見真聡，入江英嗣，吉永努
  • Industrial Property Rights Type: 特許
  • Industrial Property Number: 2014-230387
  • Filing Date: 2014-11-13