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A Study on Network Intrusion Detection Hardware for Next-Generation High-Speed Ethernets

Research Project

Project/Area Number 26330069
Research Category

Grant-in-Aid for Scientific Research (C)

Allocation TypeMulti-year Fund
Section一般
Research Field Computer system
Research InstitutionHiroshima City University

Principal Investigator

Wakabayashi Shin'ichi  広島市立大学, 情報科学研究科, 教授 (50210860)

Co-Investigator(Renkei-kenkyūsha) NAGAYAMA Shinobu  広島市立大学, 大学院情報科学研究科, 教授 (10405491)
Project Period (FY) 2014-04-01 – 2017-03-31
Project Status Completed (Fiscal Year 2016)
Budget Amount *help
¥4,680,000 (Direct Cost: ¥3,600,000、Indirect Cost: ¥1,080,000)
Fiscal Year 2016: ¥1,040,000 (Direct Cost: ¥800,000、Indirect Cost: ¥240,000)
Fiscal Year 2015: ¥1,040,000 (Direct Cost: ¥800,000、Indirect Cost: ¥240,000)
Fiscal Year 2014: ¥2,600,000 (Direct Cost: ¥2,000,000、Indirect Cost: ¥600,000)
Keywordsネットワーク侵入検知 / FPGA / 正規表現マッチング / 有限オートマトン / スクリーニング / 正規表現 / 非決定性有限オートマトン
Outline of Final Research Achievements

This research proposes a new structure of network intrusion detection systems for very high-speed internet, whose transmission rate is more than 40Ggps. In the proposed system, a dedicated circuit performs “screening” of input packets, and for suspicious packets which might contain “computer virus”, complete matching will be performed to determine they are in fact infected by a virus. The proposed system can achieve a high throughput while the circuit size can be reduced. Experimental results show the effectiveness of the proposed system.

Report

(4 results)
  • 2016 Annual Research Report   Final Research Report ( PDF )
  • 2015 Research-status Report
  • 2014 Research-status Report
  • Research Products

    (5 results)

All 2017 2016 2015

All Presentation (5 results) (of which Int'l Joint Research: 1 results)

  • [Presentation] ネットワーク侵入検知のためのスクリーニング回路に対する最適スクリーニングパターン生成について2017

    • Author(s)
      橋本智明, 永山忍, 稲木雅人, 若林真一
    • Organizer
      電子情報通信学会VLSI設計技術研究会
    • Place of Presentation
      那覇市(沖縄県)
    • Year and Date
      2017-03-01
    • Related Report
      2016 Annual Research Report
  • [Presentation] ストリームデータに対するマハラノビス距離に基づく外れ値検出手法のFPGA実装2017

    • Author(s)
      荒井悠人, 若林真一, 永山忍, 稲木雅人
    • Organizer
      電子情報通信学会リコンフィギャラブルシステム研究会
    • Place of Presentation
      横浜市(神奈川県)
    • Year and Date
      2017-01-23
    • Related Report
      2016 Annual Research Report
  • [Presentation] A High-Speed Programmable Network Intrusion Detection System Based on a Multi-Byte Transition NFA2016

    • Author(s)
      Tomoaki Hashimoto, Shin’ichi Wakabayashi, Shinobu Nagayama, Masato Inagi, Ryohei Koishi, Hiroki Takaguchi
    • Organizer
      CENICS 2016 : The Ninth International Conference on Advances in Circuits, Electronics and Micro-electronics
    • Place of Presentation
      Nice (France)
    • Year and Date
      2016-07-24
    • Related Report
      2016 Annual Research Report
    • Int'l Joint Research
  • [Presentation] 高速ネットワークにおける侵入検知に対するスクリーニング回路とFPGA実装2016

    • Author(s)
      高口裕貴,若林真一,永山忍,稲木雅人
    • Organizer
      電子情報通信学会VLSI設計技術研究会
    • Place of Presentation
      沖縄県青年会館(沖縄県那覇市)
    • Year and Date
      2016-03-01
    • Related Report
      2015 Research-status Report
  • [Presentation] 高速ネットワークにおける多バイト遷移非決定性有限オートマトンによる侵入検知2015

    • Author(s)
      若林真一,橋本智明,小石涼平,高口裕貴,永山忍,稲木雅人
    • Organizer
      電子情報通信学会リコンフィギャラブルシステム研究会
    • Place of Presentation
      慶應義塾大学日吉キャンパス(神奈川県横浜市)
    • Year and Date
      2015-01-29 – 2015-01-30
    • Related Report
      2014 Research-status Report

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Published: 2014-04-04   Modified: 2018-03-22  

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