A Reduction Technique for Temporal-Spatial Vth Variations and Leakage in a Coordinated Manner for SRAM-ReRAM Stacked Memories
| Project/Area Number |
26420326
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| Research Category |
Grant-in-Aid for Scientific Research (C)
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| Allocation Type | Multi-year Fund |
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| Section | 一般 |
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| Research Field |
Electron device/Electronic equipment
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| Research Institution | Fukuoka Institute of Technology |
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Principal Investigator |
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| Project Period (FY) |
2014-04-01 – 2017-03-31
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| Project Status |
Completed (Fiscal Year 2016)
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| Budget Amount *help |
¥5,200,000 (Direct Cost: ¥4,000,000、Indirect Cost: ¥1,200,000)
Fiscal Year 2016: ¥1,560,000 (Direct Cost: ¥1,200,000、Indirect Cost: ¥360,000)
Fiscal Year 2015: ¥1,560,000 (Direct Cost: ¥1,200,000、Indirect Cost: ¥360,000)
Fiscal Year 2014: ¥2,080,000 (Direct Cost: ¥1,600,000、Indirect Cost: ¥480,000)
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| Keywords | SRAM / ReRAM / 時空間ランダムばらつき / デコンボリューション / 時空間ばらつき / 改良リチャードソンルーシー / 逆畳み込み解析のアルゴリズム / リチャードソンルーシーの改良 |
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| Outline of Final Research Achievements |
This study is to address the two critical issues facing the area and power-supply voltage Vdd scaling of the VLSI in a coordinated manner: increasing of (1) spatial and temporal threshold-voltage variations (σVt_RTN) and (2) sub-threshold leakage. To quantitatively evaluate the effectiveness of the proposed control operations for reducing the probability of multiple electron trapping status, statistical analysis tools with blind deconvolution ringing behavior avoidance techniques were developed. It is found that the key to avoid the ringing behavior is to adjust the phase of the distribution tails between the two blind deconvolution objects. The ringing behavior avoidance techniques are evaluated under wide ranges of slope of the distribution tails.
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Report
(4 results)
Research Products
(13 results)
