Designing concurrent data structures: combining hardware transactional memory and traditional mutual exclusions
| Project/Area Number |
26540042
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| Research Category |
Grant-in-Aid for Challenging Exploratory Research
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| Allocation Type | Multi-year Fund |
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| Research Field |
Multimedia database
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| Research Institution | Tokyo Institute of Technology |
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Principal Investigator |
Miyazaki Jun 東京工業大学, 情報理工学院, 教授 (40293394)
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| Project Period (FY) |
2014-04-01 – 2017-03-31
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| Project Status |
Completed (Fiscal Year 2016)
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| Budget Amount *help |
¥3,770,000 (Direct Cost: ¥2,900,000、Indirect Cost: ¥870,000)
Fiscal Year 2016: ¥1,300,000 (Direct Cost: ¥1,000,000、Indirect Cost: ¥300,000)
Fiscal Year 2015: ¥1,170,000 (Direct Cost: ¥900,000、Indirect Cost: ¥270,000)
Fiscal Year 2014: ¥1,300,000 (Direct Cost: ¥1,000,000、Indirect Cost: ¥300,000)
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| Keywords | 並行データ構造 / ハードウェアトランザクショナルメモリ / 排他制御 / データ並列プリミティブ / 性能評価 / 並行処理 / HTM |
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| Outline of Final Research Achievements |
Recently, researchers have actively studied on designing faster algorithms and their data structures for manycore processors, such as a multicore CPU and a GPU. Since data structures in many applications are shared by concurrent threads in these shared memory processors, the mutual exclusion for them becomes one of the serious bottlenecks.
To cope with this problem, this study presents on configuring concurrent data structures using hardware transactional memory which is recently available through case studies on LRU and B-tree. In addition, aiming at highly parallel processing on a GPU which can hardly use mutual exclusion, it is revealed that realistic text processing can greatly be accelerated by combining the dictionary primitive that we proposed and existing data parallel primitives.
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Report
(4 results)
Research Products
(4 results)
