| Budget Amount *help |
¥3,640,000 (Direct Cost: ¥2,800,000、Indirect Cost: ¥840,000)
Fiscal Year 2016: ¥780,000 (Direct Cost: ¥600,000、Indirect Cost: ¥180,000)
Fiscal Year 2015: ¥1,690,000 (Direct Cost: ¥1,300,000、Indirect Cost: ¥390,000)
Fiscal Year 2014: ¥1,170,000 (Direct Cost: ¥900,000、Indirect Cost: ¥270,000)
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| Outline of Final Research Achievements |
In this research, we developed a design automation system that realized both acceleration and low power consumption. The developed system combined multiple power supply voltages in which power consumption is reduced by assigning appropriate power supply voltage to each COMS gate, and general-synchronous framework in which the clock frequency is improved by utilizing the clock skew efficiently. In computational experiments, the circuits obtained by the developed system simultaneously realized higher circuit performance and lower power consumption than that in conventional clock synchronous framework.
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