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Development of a high speed communication platform for the FPGA-based high performance computing systems

Research Project

Project/Area Number 26730032
Research Category

Grant-in-Aid for Young Scientists (B)

Allocation TypeMulti-year Fund
Research Field Computer system
Research InstitutionKawasaki University of Medical Welfare

Principal Investigator

Kondo Masafumi  川崎医療福祉大学, 医療技術学部, 講師 (90590133)

Project Period (FY) 2014-04-01 – 2016-03-31
Project Status Completed (Fiscal Year 2015)
Budget Amount *help
¥3,640,000 (Direct Cost: ¥2,800,000、Indirect Cost: ¥840,000)
Fiscal Year 2015: ¥1,820,000 (Direct Cost: ¥1,400,000、Indirect Cost: ¥420,000)
Fiscal Year 2014: ¥1,820,000 (Direct Cost: ¥1,400,000、Indirect Cost: ¥420,000)
KeywordsGALSシステム / 非同期式回路 / アービタ / リングバス / FPGA / GASLシステム
Outline of Final Research Achievements

Recently, a Field-Programmable Gate Array (FPGA) has been noted as the hardware accelerators for high-performance computing. The distributed ring segmented bus (RSB) which connects an annular bus dynamically was proposed for the asynchronous bus between FPGA. In order to improve extensibility, the arbiters which control the divided buses connect the shortest path based on the wire delay. The distributed RSB system was designed as asynchronous circuits, and its operation was confirmed by implementing to four FPGA (Xilinx KC705). In addition, the effects of the FPGAs and wire delay on performance was clarified through the Monte Carlo simulation using implemented wire delay.

Report

(3 results)
  • 2015 Annual Research Report   Final Research Report ( PDF )
  • 2014 Research-status Report
  • Research Products

    (9 results)

All 2016 2015 2014

All Journal Article (1 results) (of which Peer Reviewed: 1 results,  Open Access: 1 results,  Acknowledgement Compliant: 1 results) Presentation (8 results)

  • [Journal Article] A Performance Evaluation Tool of GALS Systems for Design Optimization2015

    • Author(s)
      近藤真史, 横川智教, 佐藤洋一郎, 有本和民
    • Journal Title

      Computer Software

      Volume: 32 Issue: 4 Pages: 4_115-4_130

    • DOI

      10.11309/jssst.32.4_115

    • NAID

      130005130092

    • ISSN
      0289-6540
    • Related Report
      2015 Annual Research Report
    • Peer Reviewed / Open Access / Acknowledgement Compliant
  • [Presentation] 複数のFPGAに対する分散型非同期式アービタの実装と評価2016

    • Author(s)
      中野涼太,近藤真史,横川智教,佐藤洋一郎,有本和民
    • Organizer
      LSIとシステムのワークショップ2016
    • Place of Presentation
      東京大学(東京都・目黒区)
    • Year and Date
      2016-05-16
    • Related Report
      2015 Annual Research Report
  • [Presentation] 複数のFPGAに対する分散型非同期式アービタの実装と評価2016

    • Author(s)
      中野涼太,荒木英友,近藤真史,横川智教,佐藤洋一郎,有本和民
    • Organizer
      2016年電子情報通信学会総合大会
    • Place of Presentation
      九州大学(福岡県・福岡市)
    • Year and Date
      2016-03-16
    • Related Report
      2015 Annual Research Report
  • [Presentation] Verilog-HDLによる大規模ハードウェア設計の検証支援ツールの開発2016

    • Author(s)
      森光勇太,横川智教,近藤真史,宮崎仁,佐藤洋一郎,有本和民
    • Organizer
      電子情報通信学会VLSI設計技術研究会
    • Place of Presentation
      沖縄青年会館(沖縄県・那覇市)
    • Year and Date
      2016-02-29
    • Related Report
      2015 Annual Research Report
  • [Presentation] 大規模ハードウェアIPへの記号モデル検査の適用事例2015

    • Author(s)
      森光勇太,横川智教,近藤真史,宮崎仁,佐藤洋一郎,有本和民
    • Organizer
      電子情報通信学会VLSI設計技術研究会
    • Place of Presentation
      小樽商科大学(北海道・小樽市)
    • Year and Date
      2015-06-17
    • Related Report
      2015 Annual Research Report
  • [Presentation] リングセグメント型GALSシステムを対象とした分散型アービタの設計2015

    • Author(s)
      小田桐由樹,近藤真史,横川智教,佐藤洋一郎,有本和民
    • Organizer
      2015年電子情報通信学会総合大会
    • Place of Presentation
      立命館大学(滋賀県・草津市)
    • Year and Date
      2015-03-10 – 2015-03-12
    • Related Report
      2014 Research-status Report
  • [Presentation] 分散制御型リングセグメントバスシステムの構成法2014

    • Author(s)
      赤利昌紀,小田桐由樹,近藤真史,佐藤洋一郎,横川智教,有本和民
    • Organizer
      第65回電気・情報関連学会中国支部連合大会
    • Place of Presentation
      福山大学(広島県・福山市)
    • Year and Date
      2014-10-25
    • Related Report
      2014 Research-status Report
  • [Presentation] リングセグメント型GALSシステムの階層化2014

    • Author(s)
      近藤真史,横川智教,佐藤洋一郎,有本和民
    • Organizer
      電子情報通信学会VLSI設計技術研究会
    • Place of Presentation
      東北大学(宮城県・仙台市)
    • Year and Date
      2014-10-02
    • Related Report
      2014 Research-status Report
  • [Presentation] リングセグメント型GALSシステムを対象とした分散型非同期式アービタ2014

    • Author(s)
      小田桐由樹,赤利昌紀,近藤真史,横川智教,佐藤洋一郎,有本和民
    • Organizer
      電子情報通信学会VLSI設計技術研究会
    • Place of Presentation
      北海道大学(北海道・札幌市)
    • Year and Date
      2014-07-11
    • Related Report
      2014 Research-status Report

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Published: 2014-04-04   Modified: 2017-05-10  

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