Study on layout design station with custom LSI

Research Project

Project/Area Number	59850058
Research Category	Grant-in-Aid for Developmental Scientific Research
Allocation Type	Single-year Grants
Research Field	計算機工学
Research Institution	Tohoku University
Principal Investigator	ESASHI Masayoshi 東北大学, 工, 助教授 (20108468)
Project Period (FY)	1984 – 1985
Project Status	Completed (Fiscal Year 1985)
Budget Amount *help	¥5,500,000 (Direct Cost: ¥5,500,000) Fiscal Year 1985: ¥1,000,000 (Direct Cost: ¥1,000,000) Fiscal Year 1984: ¥4,500,000 (Direct Cost: ¥4,500,000)
Keywords	Custom LSI / Work station / CAD / Layout design / Multi-processor / Parallel processor / スイッチングネットワーク
Research Abstract	The layout design station for the efficient design of LSI layout is developed. This system has a special purpose hardware to make neighborhood operations fast and has functions as design rule check etc.. This constructs semiautomatic design station which automates low level operations. This brings out quick responsability to make the most of the intuition of the designer. Following results are obtained in this study. 1. Hardware. Two dimentional parallel processing system, which operates on the bit map pattern data with 128 processor elements, is developed. High speed switching network i.e. two dimentional oarrel shifter, which enables efficient two dimentional memory access, is implemented as custom LSIs. Each parts of the system that are for parallel processing, for memory, for display and draw, for address caliculation and for microprogram control respectively are assembled to total system and all performances of this system is certified. 2. Software. The microprogram for design rule check etc. are made to operate this system practically. The effectiveness as a layout design station or that for the simulation of cell automatone are also developed and then this presents the ability of this system for general two dimentional parallel processing.