| Project/Area Number |
63550280
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| Research Category |
Grant-in-Aid for General Scientific Research (C)
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| Allocation Type | Single-year Grants |
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| Research Field |
計算機工学
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| Research Institution | Waseda University |
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Principal Investigator |
MURAOKA Yoichi Waseda University, School of Science and Engineering, Professor, 理工学部, 教授 (50182085)
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| Project Period (FY) |
1988 – 1989
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| Project Status |
Completed (Fiscal Year 1989)
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| Budget Amount *help |
¥2,300,000 (Direct Cost: ¥2,300,000)
Fiscal Year 1989: ¥1,100,000 (Direct Cost: ¥1,100,000)
Fiscal Year 1988: ¥1,200,000 (Direct Cost: ¥1,200,000)
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| Keywords | Parallel Processing / Data Flow / FORTRAN / スーパーコンピュータ / データフロー |
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| Research Abstract |
The parallel processing system -Harray- is a multiprocessor system consisting of one thousand processors aiming at fast execution of scientific computations. The -Harray- system targets fast execution of FORTRAN programs because scientific and engineering programs have been written in FORTRAN. Because FORTRAN is a sequential programming language, it is up to a compiler to expose parallelism in sequentially written programs. However, the semantic gap between a sequential language and parallel execution is very wide. Therefore, the -Harray- system adopts a "Controlled Dataflow" mechanism to bridge this semantic gap and take full advantage of both the control flow and the dataflow mechanism. In the Controlled Dataflow mechanism, a FORTRAN program is devided into a set of macro-blocks, which is a set of statements, including only one entry point of control dependency. A macro-block is a unit whose execution is controlled by the Controlled Dataflow mechanism. Operations in a macro-block are executed by the dataflow mechanism, while the execution order of macro-block is controlled by the controlled flow mechanism.
In the period reported in this report, the circuit design as well as the system design of a processing element have been completed.
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