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"Optimization of Switching Characteristics of High-Power Static Induction (SI) devices"

Research Project

Project/Area Number 63550285
Research Category

Grant-in-Aid for General Scientific Research (C)

Allocation TypeSingle-year Grants
Research Field 電子機器工学
Research InstitutionThe University of Tokyo

Principal Investigator

TAMURA Minoru  The University of Tokyo, Faculty of Engineering, Assistant, 工学部, 助手 (00011180)

Co-Investigator(Kenkyū-buntansha) MASADA Eisuke  The University of Tokyo, Faculty of Engineering, Professor, 工学部, 教授 (40010706)
Project Period (FY) 1988 – 1990
Project Status Completed (Fiscal Year 1990)
Budget Amount *help
¥2,200,000 (Direct Cost: ¥2,200,000)
Fiscal Year 1990: ¥300,000 (Direct Cost: ¥300,000)
Fiscal Year 1989: ¥900,000 (Direct Cost: ¥900,000)
Fiscal Year 1988: ¥1,000,000 (Direct Cost: ¥1,000,000)
KeywordsStatic Induction Device / SPICE / 静電誘導デバイス / SIサイリスタ / SIトランジスタ / 静電誘導サイリスタ / SITh / 静電誘導トランジスタ / SIT
Research Abstract

Utilizing the device simulation code for high power switching semiconductor device developed by the authors, the switching characteristics of the static induction power devices are studied and their dependency on parameters of the devices is analyzed. Since the interests are focused on their ability in high power operation, the static induction thyristor (SI-Th) is taken up as the object analyzed.
To improve the switching capabilities, especially local switching loss reduction, the structure and dimension of the device are varied. The two-directional shorting emitter, the profile near gate area and the effective width of the buried gate region are studied in relation with carrier flow, current concentration during switching-off and the profile of the voltage recovery. Their effects and suggestions to the improvement of the design are given from the simulation results.
In order to relate such detailed analysis of the phenomenon in the device with the outer circuit construction too, the modeling scheme with SPICE is considered. The difference of the characteristics viewing from outside between SITh and buried gate GTO is not so introduced. The measured parameters required for the modeling with SPICE are made to be related with device parameters and compared with the experimental results. A practical way to obtain equivalent device parameter of SPICE from the device parameters such as life times, impurity concentration distribution and dimensions is shown. Thedirect measuring scheme is also studied.
Further study is required on the optimal coordination between device structure and the snubber circuit configuration, especially in relation with the introduction of the active snubber. The scheme developed here is useful to evaluate the effectiveness of the specific circuit against the device with a special structure. The method to optimize automatically the circuit parameters for this purpose should be developed in future.

Report

(4 results)
  • 1990 Annual Research Report   Final Research Report Summary
  • 1989 Annual Research Report
  • 1988 Annual Research Report

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Published: 1988-04-01   Modified: 2016-04-21  

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