Project/Area Number |
63850058
|
Research Category |
Grant-in-Aid for Developmental Scientific Research
|
Allocation Type | Single-year Grants |
Research Field |
電子材料工学
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Research Institution | TOHOKU UNIVERSITY |
Principal Investigator |
OHMI Tadahiro PROFESSOR, DEPT. OF ELECTRONIC ENGINEERING TOHOKU UNIVERSITY, 工学部, 教授 (20016463)
|
Co-Investigator(Kenkyū-buntansha) |
MORITA Mizuho RESEARCH ASSOCIATE, DEPT. OF ELECTRONIC ENGINEERING TOHOKU UNIVERSITY, 工学部, 助手 (50157905)
SHIBATA Tadashi ASSOCIATE PROFESSOR, DEPT. OF ELECTRONIC ENGINEERING TOHOKU UNIVERSITY, 工学部, 助教授 (00187402)
|
Project Period (FY) |
1988 – 1989
|
Project Status |
Completed (Fiscal Year 1989)
|
Budget Amount *help |
¥39,300,000 (Direct Cost: ¥39,300,000)
Fiscal Year 1989: ¥13,300,000 (Direct Cost: ¥13,300,000)
Fiscal Year 1988: ¥26,000,000 (Direct Cost: ¥26,000,000)
|
Keywords | Sputtering / Low temperature processing / Silicon epitaxy / Low energy ion bombardment / Copper interconnect / Aluminum interconnect / Ultralarge scale integration / 低温エピタキシャル成長 / エピタキシャルシリコン / 静電チャック / RFバイアス / 二周波励起 / 薄膜形成 |
Research Abstract |
New process equipment as well as new process technologies utilizing the equipment has been developed. As a result, low temperature formation of high quality thin films with ideal interface characteristics, the most essential requirement for ultralarge scale integration (ULSI), has been established. RF power inputs with two different frequencies were supplied to the target and wafer-holder electrodes, controlling the Ar plasma created in the interelectrode region. This has enabled us to control the most important thin film growth parameters, such as film growth rate, surface activating ion bombardment energy and flux, in a very accurate manner. Furthermore, introduction of a newly designed shielding electrode reduces the plasma potential, thus eliminating the contamination due to the chamber material sputtering. Application of the new process technology for thin film growth has revealed a number of interesting and important features as described below. The silicon epitaxial growth tempe
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rature has been reduced to as low as 250゚C. Complete dopant activation at this low temperature, as well as the fabrication of devices with excellent performance have been experimentally demonstrated. When the process was applied to the formation of Cu thin films, we have succeeded to produce almost-single crystal Cu interconnect patterns on the SiO_2 surface. In addition, the formation of ideal metal/semiconductor contact characteristics were verified without any alloying beat cycles. Application of the process to aluminum interconnect formation was also very successful. A very low Al- N^+ silicon contact resistance is established without any alloying heat cycles. Complete suppression of hillock formation up to 500゚C annealing temperature is possible by optimizing the ion bombardment condition. Excellent refill characteristics at high aspect-ratio contacts/vias are realized using the identical ion bombardment condition optimized for hillock suppression. As a result, the process and the equipment is ideal for application to deep-submicron ULSI fabrication. Less
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