1992 Fiscal Year Final Research Report Summary
Fundamental Research on Neural Networks Based on Analysis Techniques for Electronic Circuits
| Project/Area Number |
03650279
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| Research Category |
Grant-in-Aid for General Scientific Research (C)
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| Allocation Type | Single-year Grants |
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| Research Field |
電子通信系統工学
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| Research Institution | Kyushu Institute of Technology |
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Principal Investigator |
URAHAMA Kiichi Kyushu Institute of Technology, Department of Computer Science and Electronics, Associate Professor, 情報工学部, 助教授 (10150492)
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| Project Period (FY) |
1991 – 1992
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| Keywords | Neural Network / Hopfield Network / Analog Network / Combinatorial Opt imitation / Annealing / Clustering / Image Reconstruction / 画像復元 |
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| Research Abstract |
This research addressed some problems appearing in the Hopfield network such as the growth of computational time with the scale of the network, its unavailability for real time processing due to production of infeasible solutions, and absence of guarantee for its performance. The following solutions for these problems were developed: (1) The growth of computational time was proved to be attributed to the increase in the stiffness with the scale of networks. A new stiffly-stable numerical algorithm was proposed and its convergence property was investigated. (2) The penalty method employed in the Hopfield network was shown to produce infeasible solutions. A new analog technique using the Lagrange multiplier method instead of the penalty method was developed and an electronic circuit was implemented which executes this new method. An analog method solving Bellman's equation was proposed for the shortest path problem, linear programming solver based on the duality theorem and combinatorial programming solution method employing WTA mechanism were developed. (3) The worst case error of this new method was evaluated theoretically for the maximum cut problem, one of NP-hard combinatorial problems. This evaluation guarantees the new method performs at worst equally well as the conventional algorithms. (4) A new annealing technique was developed for electronic circuits implementing the Hopfield networks. This annealing method has been verified experimentally to raise the performance of the networks.
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