| Project/Area Number |
04044085
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| Research Category |
Grant-in-Aid for international Scientific Research
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| Allocation Type | Single-year Grants |
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| Section | Joint Research |
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| Research Institution | Kyoto University |
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Principal Investigator |
KAMBAYASHI Yahiko Kyoto University, Faculty of Engineering, Professor, 工学部, 教授 (00026311)
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| Co-Investigator(Kenkyū-buntansha) |
SAWADA Sunao Kyushu University, Department of Computer Science and Communication Engineering,, 工学部, 助手 (70235464)
IWAMA Kazuo Kyushu University, Department of Computer Science and Communication Engineering,, 工学部, 教授 (50131272)
CHEN Oiming University of California, Dept.of Computer Science, Visiting Professor, 計算機科学科, 客員教授
MUROGA Sabro University of Illinois, Dept.of Computer Science, Professor, 計算機科学科, 教授
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| Project Period (FY) |
1992 – 1994
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| Keywords | Logic Design / Computer Aided Design / Transduction Method / Object Oriented / 相互運用性 / オブジェクト指向 |
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| Research Abstract |
Various improved versions of transduction methods (originally developed by Kambayashi and Muroga) and new applications such as design of FPGAs (Field Programmable Gate Arrays). As one of the advantages of transduction method is that we can reuse design results. This property is suitable for CAD databases. A new data model suitable for CAD database and user coordination is also developed. Programs of transduction methods and CAD databases are implemented. Details of the results are as follows.
(1) Improvement of transduction methods based on error-compensation : In order to improve network pattern modification capability, transduction methods based on error-compensation were developed. We made a new version of the method and improved the computation time, which was a serious disadvantage of error-compensation.
(2) Design of large circuits using transduction method : As the maximum size of the circuits handled by transduction methods is determined by the BDD (Binary Decision Diagram) size, we will select a part of a circuit to improve the design for a large circuit. We have developed several methods to select such a partial circuits.
(3) FPGA design by transduction method : For a given FPGA circuit, an improved circuit is generated by merging logic blocks and removing redundant connections.
(4) Realization of a data-knowledge coordination model : For CAD databases it is important to use various kinds of databases and knowledgebases distributed in various locations. We have implemented a system consisting of three hierarchies, one fore databases, one for knowledgebases and one for coordination. Object deputy model is used for realization. Furthermore, fundamental mechanisms for user coordination for CAD databases are developed.
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