1996 Fiscal Year Final Research Report Summary
マルチメディア指向超並列マシンアーキテクチャーとそのソフトウェア実用化の研究
| Project/Area Number |
06558050
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| Research Category |
Grant-in-Aid for Scientific Research (A)
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| Allocation Type | Single-year Grants |
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| Section | 試験 |
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| Research Field |
情報システム学(含情報図書館学)
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| Research Institution | KYUSHU UNIVERSITY |
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Principal Investigator |
AMAMIYA Makoto Kyushu University Department of Intelligent Systems, 大学院・システム情報科学研究科, 教授 (90202697)
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| Co-Investigator(Kenkyū-buntansha) |
TOMIYASU Hiroshi Kyushu University Department of Intelligent Systems, 大学院・システム情報科学研究科, 助手 (50284550)
KUSAKABE Shigeru Kyushu University Department of Intelligent Systems, 大学院・システム情報科学研究科, 助手 (70234416)
MINE Tunenori Kyushu University Department of Intelligent Systems, 大学院・システム情報科学研究科, 助教授 (30243851)
TANIGUCHI Rin-ichiro Kyushu University Department of Intelligent Systems, 大学院・システム情報科学研究科, 教授 (20136550)
MAKINOUCHI Akifumi Kyushu University Department of Intelligent Systems, 大学院・システム情報科学研究科, 教授 (30221576)
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| Project Period (FY) |
1994 – 1996
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| Keywords | multi-media / massively parallel / multi-thread / fine grain parallel processing / dataflow / Video / image processing / I / O |
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| Research Abstract |
Recently multimedia oriented applications have become of general interest. Currently several-types of multimedia systems are developed. However these systems provide only simple applications, such as decoding video stream, transferring video image. Furthermore, those system do not hove enough resolution in time and space.
In this research, our concept is constructing the multimedia system which provides flexible and high performance multimedia environment.
To realize our concept, we researched in following three subjects.
1.Architecture of Multimedia Machine
(i) Processor Element architecture
We chose multi-thread base architecture Ddatarol-II.In this research we refined this architecture to conform recent hardware environments. Each processor element consists of commercial micro processor and FMP (Fine-grain Message Processor). FMP provides low latency message handling.
(ii) Network architecture
We built a deadlock free 2D torus interconnection network. This network is scalable, and provides
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low latency and high throughput communications. In addition we designed specialized network for I/O and a real time video I/O system.
(iii) Prototype design
To investigate above concepts, we designed and produced a prototype machine KUMP/D which has 16 processor elements.
(iv) Performance Evaluation
We showed advantages of our concepts in fine-grain multi-thread processing by a simulator.
2.Software Environment
(i) Massively Parallel Language V
V is a dataflow semantic base functional language with parallel objects which are called agents. To achieve well portability, the V compiler has two phase. The V compiler generates machine independent code DVMC (Datarol Virtual Machine Code) in the first phase, and generates machine depend code in second phase.
(ii) Development of Massively Parallel Language V
We investigated code generation method for V,and developed library for multi-thread parallel processing. We also defined multimedia data types and assignment.
3.Parallel Image Processing
We developed several types of image processing applications by V,and evaluated performance. By this evaluation, we showed that a programr can describe image processing applications simply and directly by V.We also ascertained remarkable speed up by parallel processing. Detaflow semantic base massively parallel language V is quite effective in developing parallel image processing applications. Less
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