1997 Fiscal Year Final Research Report Summary
Study on Multithreaded Parallel Computer
| Project/Area Number |
07458057
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| Research Category |
Grant-in-Aid for Scientific Research (B)
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| Allocation Type | Single-year Grants |
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| Section | 一般 |
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| Research Field |
計算機科学
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| Research Institution | Nagoya University |
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Principal Investigator |
SHIMADA Toshio Nagoya University, Graduate School of Engineering, Professor, 工学研究科, 教授 (60252251)
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| Project Period (FY) |
1995 – 1997
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| Keywords | multithread / parallel computer / non-numeric parallel processing |
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| Research Abstract |
Current commercial parallel computers have high peak performance, but it is only effective for numerical computations. In this research, we propose several mechanisms that can execute non-numerical application efficiently on a multithread computer.
1.Thread level parallel hardware
(1) Implicit context switch mechanism using memory cycle steel
(2) Computer architecture to execute multithreads efficiently
(3) Very low latency communication mechanism between multithreads
2.Instruction level parallel hardware
(1) Highly precise branch prediction mechanism
(2) Speculative data fetch mechanism
3.Compiler for a multithread computer
We developed a compiler which can extract concurrent executable threads from current sequential programs. This method is general and can be applied for many other parallel computers.
Parallel software
(1) We developed a numerical simulation language processing system that can automatically generate parallel programs from partial differential equations.
(2) Dynamic load balance mechanism using current load balance and computer throughput
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