1997 Fiscal Year Final Research Report Summary
A Research on a Virtual Model-Architecture for Massively Parallel Computer Systems
| Project/Area Number |
08458069
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| Research Category |
Grant-in-Aid for Scientific Research (B)
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| Allocation Type | Single-year Grants |
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| Section | 一般 |
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| Research Field |
計算機科学
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| Research Institution | Kyoto Institute of Technology |
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Principal Investigator |
SHIBAYAMA Kiyoshi Kyoto Inst.Tech., Eng. & Design, Prof., 工芸学部, 教授 (70127091)
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| Co-Investigator(Kenkyū-buntansha) |
HIRATA Hiroaki Kyoto Inst.Tech., Eng. & Design, Assistant Prof., 工芸学部, 助手 (90273549)
NIIMI Haruo Kyoto Inst.Tech., Eng. & Design, Assoc.Prof., 工芸学部, 助教授 (40144331)
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| Project Period (FY) |
1996 – 1997
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| Keywords | Mssively Parallel Computer System / Model-Architecture / Virtual computer / Testbed / Computer Architecture / Hardware / Software Tradeoffs |
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| Research Abstract |
On the side of the architects of massively parallel processors, it is difficult to manufacture by way of tried experiment and to access their own designing architectures repeatedly. Therefore, it is looked for an environment aiding to design and assess the hardware / software tradeoff.
And, though required the experimental environment for the consistent education from algorithm to system programming and hardware architecture, a few institution can provide a massively parallel processing system.
In this research, we have provided a virtual massively parallel processing environment aiming at effective use for education and research. We have summarized requirements for this environment, and emphasized its adaptability to various problems. We have suggested a virtual model-architecture, consisting of clusters of multiple bus-based distributed shared memory architecture. We have also discussed implementation of the virtual massively parallel processor architecture which is the kernel of this environment. Finally, we have presented an experimental parallel programming system.
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