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1998 Fiscal Year Final Research Report Summary

Multi-Level Circuit Simulator Using Hardware Description Language

Research Project

Project/Area Number 08650461
Research Category

Grant-in-Aid for Scientific Research (C)

Allocation TypeSingle-year Grants
Section一般
Research Field System engineering
Research InstitutionShizuoka University

Principal Investigator

ASAI Hideki  Shizuoka University, Fac.of Engineering, Professor, 工学部, 教授 (40175823)

Project Period (FY) 1996 – 1998
KeywordsHardware description language / Multi-level circuit simulator / Transmission line simulator / Analog / digital mixed circuit / Verilog-A / Neural network
Research Abstract

In this research, in 1996 and 1997
1)Combination of the analog hardware description language MAST-AHDL with the system ASSIST for development of circuit simulators, and development of the analog/digital mixed signal simulator SPADE,
2) Development of the multi-level simulator DESIRE which can cope with lumped/distributed elements-mixed circuits,
3)Development of a novel high-speed neural network simulator have been done. in 1998, the above researches has been continued and the following results have been obtained.
a)The analog hardware description language Verilog-Ahas been combined with ASSIST.As a result, we have constructed the system which enables modeling of the functional blocks by Verilog-A, where SPADE can simulate the mixed signal circuits
b)The expanded GMC has been proposed for the large scale interconnect network analysis. Furthermore, FDTD method has been combined with DESIRE.As a result, we have constructed the high performance simulator which can simulate efficiently linear/nonlinear large networks with many interconnects.
c) We have applied SPADE to the simulation of neural networks, where the operational amplifier and the neuron amplifier have been modeled by Verilog-A.As a result, we have confirmed that analog neural networks can be simulated efficiently by SPADE.

  • Research Products

    (24 results)

All Other

All Publications (24 results)

  • [Publications] 浅井秀樹: "アナログハードウエア記述言語をどう活用するか? 〜シミュレータ開発の立場から〜" 電子情報通信学会1998年総合大会講演論文集. 基礎・境界. 465-466 (1998)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] Takayuki Watanabe: "Relaxation-based Transient Analysis of Lossy Coupled Transmisson Lines Circuits Using Dealy Evaluation Technique" IEICE Trans.on Fundamentals. E81-A 6. 1055-1061 (1998)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] 吉見 勤: "回路分割を用いたShooting法によるMOS回路の定常解析" 電子情報通信学会技術研究報告. CAS98-35 NLP98-43. 37-42 (1998)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] 加茂 篤司: "伝送線路を含む回路解析におけるGMCの拡張" 電子情報通信学会技術研究報告. CAS98-36 NLP98-44. 43-49 (1998)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] 渡辺 貴之: "各層基板上の配線形状を考慮した伝送線路過渡シミュレーションに関する一考察" 電子情報通信学会技術研究報告. CAS98-38 NLP98-46. 59-66 (1998)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] Hiroshi Sagesaka: "SPADE : Analog/Digital Mixed Signal Simulator with Analog Hardware Description Language" Proc.IEEE Int'l Conf.on Electronics Circuits and Systems. 1of3. 517-520 (1998)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] Atsushi Kamo: "Neural Network Simulator for Spatiotemporal Pattern Analysis" Proc.IEEE Int'l Conf.on Electronics, Circuits and Systems. 2of3. 109-112 (1998)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] Takayuki Watanabe: "Transient Analysis for High-Speed Interconnect Networks Based on AWE and Delay Evaluation Technique" Proc.IEEE Int's Conf.on Electronics, Circuits and Systems. 3of3. 103-106 (1998)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] Atsushi Kamo: "Transient Analysis for Transmission Line Networks Using Expanded GMC" Proc.int'l Symp.on Nonlinear Theory and its Applications. 1. 263-266 (1998)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] Atsushi Kamo: "A Fast Neural Network Simulator for state Transition Analysis" Proc.Int's Symp.on Nonlinear Theory and its Applications. 3. 1181-1184 (1998)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] 吉見 勤: "Spiceとの互換を目指した回路シミュレータ開発支援ツールASSISTの改良" 電子情報通信学会技術研究報告. CAS98-109. 87-92 (1999)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] 提坂 洋: "回路シミュレータ開発支援ツールASSISTへのVerilog-Aによるモデル記述の適用" 電子情報通信学会技術研究報告. CAS98-110. 93-100 (1999)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] Hideki Asai: "How Do We Apply Analog HDL?" Proc.of the 1998 IEICE General Conference. PA-1. 465-466

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] Takayuki Watanabe: "Relaxation-Based Transient Analysis of Lossy Coupled Transmission Lines Circuits Using Delay Evaluation Technique" IEICE Trans.on Fundamentals. vol.E81-A,no.6. 1055-1061 (1998)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] Tsutomu Yoshimi: "Steady-State Analysis of MOS Circuits by Shooting Method Based on Decomposition Techniques" Technical Report of IEICE. CAS98-35, NLP98-43. 37-42 (1998)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] Atsushi Kamo: "Transient Analysis for Transmission Line Networks Using Expanded GMC" Technical Report of IEICE. CAS98-36, NLP98-44. 43-49 (1998)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] Takayuki Watanabe: "A Study on Transient Simulation for Multi-layer and Multi-conductor Interconnects" Technical Report of IEICE. CAS98-38, NLP98-46. 59-66 (1998)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] Hiroshi Sagesaka: "SPADE : Analog/Digital Mixed Signal Simulator with Analog Hardware Description Language" Proc.IEEE Int'l Conf.on Electronics, Circuits and Systems. vol.1 of 3. 517-520 (1998)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] Atsushi Kamo: "Neural Network Simulator for Spatiotemporal Pattern Analysis" Proc.IEEE Int'l Conf.on Electronics, Circuits and Systems. vol.2 of 3. 109-112 (1998)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] Takayuki Watanabe: "Transient Analysis for High-Speed Interconnect Networks Based on AWE and Delay Evaluation Technique" Proc.IEEE Int'l Conf.on Electronics, Circuits and Systems. vol.3 of 3. 103-106 (1998)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] Atsushi Kamo: "Transient Analysis for Transmission Line Networks Using Expanded GMC" Proc.Int'l Symp.on Nonlinear Theory and its Applications. vol.1. 263-266 (1998)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] Atsushi Kamo: "A Fast Neural Network Simulator for State Transition Analysis" Proc.Int'l Symp.on Nonlinear Theory and its Applications. vol.3. 1181-1184 (1998)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] Tsutomu Yoshimi: "Improvement of ASSIST to implement SPICE-like simulator" Technical Report of IEICE. CAS98-109. 87-92 (1999)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] Hiroshi Sagesaka: "An Application of Modeling with Analog Hardware Description Language to ASSIST" Technical Report of IEICE. CAS98-110. 93-100 (1999)

    • Description
      「研究成果報告書概要(欧文)」より

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Published: 1999-12-08  

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