Co-Investigator(Kenkyū-buntansha) |
SUYAMA Ken Columbia University, Department of Electrical Engineering, Associate Professor, 電気工学科, 助教授
AIHRA Kazuyuki University of Tokyo, Faculty of Engineering, Professor, 工学部, 教授 (40167218)
|
Research Abstract |
Recent physiological and mathematical studies suggest that the neuron in cortex uses fine time structure of asynchronously incoming excitatoiy action potentials to achieve sophisticated information processing in the brain. Such a neuron functions as a coincident detector among spatio-temporal input pule trains. Continuous variables and time are important in the spatio- temporal network with coincident detector neurons, because real-number processing is possible with them. The real-number processing is very powerful but cannot be realized by the ordinary digital computer. In this research, the spatio-temporal processing network is implemented using analog integrated circuit technology where continuous time and variables such as voltage and current are available, First of all, an asynchronous pulse neuron model that is the core element of the asynchronous pulse propagating network is proposed. The response characteristics of the single neuron and neural network composed of numbers of neurons are investigated. As the results, chaotic responses are observed from single neuron, furthermore, dynamical assembly is organized in the network. The dynamical assembly is one candidate of the information coding in the Spatio- temporal processing. Secondly, analog circuits for the model neuron, the synapse and the axon are proposed. The delay time of the propagating pulses in the axon circuits can be controlled continuously. Moreover, weight of the synaptic circuit can be altered digitally. Finally, the proposed circuits are fabricated using 1.2mum CMOS semiconductor technology. Characteritics of the circuits are measured. As a consequence, chaotic responses are confirmed from the chip. Furthermore, pulse delay in the axon circuit is also observed. The possibility of the real-number processing using asynchronous pulse propagating network is shown through the IC implementation
|