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1998 Fiscal Year Final Research Report Summary

Study on memory characteristics of non-volatile ferroelectric-gate transistors for neural network applications

Research Project

Project/Area Number 09450123
Research Category

Grant-in-Aid for Scientific Research (B)

Allocation TypeSingle-year Grants
Section一般
Research Field Electronic materials/Electric materials
Research InstitutionTOKYO INSTITUTE OF TECHNOLOGY

Principal Investigator

TOKUMITSU Eisuke  TOKYO INSTITUTE OF TECHNOLOGY PRECISION AND INTELLIGENCE LABORATORY ASSOCIATE PROFESSOR, 精密工学研究所, 助教授 (10197882)

Co-Investigator(Kenkyū-buntansha) ISHIWARA Hiroshi  TOKYO INSTITUTE OF TECHNOLOGY FONTIER COLLABORATIVE RESEARCH CENTER PROFESSOR, フロンティア創造共同研究センター, 教授 (60016657)
Project Period (FY) 1997 – 1998
Keywordsferroelectrics / non-volatile memory / neural network / ferroelectric-gate transistor
Research Abstract

The objective of this research project is to realize "learning" and "memory" functions, which are basic properties of neurons in human brains, by using silicon integrated circuits technology, In the first year (1997), we fabricated ferroelectric-gate field effect transistors (FETs) using ferroelectric SrBi_2Ta_2O_9 (SBT) film and demonstrated non-volatile memory function of the device, However, it was also found that the memory retention time was as short as 1 hour. Hence, in 1998, we analyzed the memory retention characteristics of the ferroelectric-gate FETs and showed that such short retention time was caused by mainly two reasons ; one is that depolarization field was applied during the retention time, and the second is that the operation point is on a minor loop of P-E characteristics of the ferroelectric film. To improve the retention characteristics, we fabricated metal-ferroelectric-metal-insulator-semiconductor (MFMIS) FETs. By using a small MFM capacitor on a large MIS structure, we found that the retention time was drastically improved up to more than 1 day. Next, we fabricated synaptic device which is a ferroelectric-gate FET matrix. It was demonstrated that the weighted sum operation, which is commonly used in neural networks, can be performed by the ferroelectric-gate FET matrix. Finally, we fabricated the neuron integrated circuits on SOT substrates using a ferroelectric FET with a uni-junction transistor, or CMOS Shmit-trigger pulse oscillation circuit. We have succeeded to demonstrate the learning function of the fabricated neuron circuit.

  • Research Products

    (12 results)

All Other

All Publications (12 results)

  • [Publications] S.M.Yoon: "Adaptrive-Learning Neuron Integrated Circuits Using Metal-Ferroelectric (SrBi_2Ta_2O_9) -Semiconductor (MFS) FETs" to be published IEEE Electron Deice Letters. 20・5. (1998)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] Eisuke Tokumitsu: "Electrical Properties of MFS-FETs Using SrBi_2Ta_2O_9 Films directly Grown on Si Substrates by Sol-Gel Method" Mat.Res.Soc.Symp.Proc.493. 459-464 (1998)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] Tatsuya Kamei: "Numerical Analysis of Metal-Ferroelectric-Semiconductor Field-Effect-Transistors (MFS-FETs) Considering Inhomogeneous Ferroelectric Polarization" IEICE TRANS.ELECTRON.E81-C・4. 577-582 (1998)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] S.M.Yoon: "Electrical Characteristics of Neuron Oscillation Circuits Composed of MOSFETs and Complementary Unijungtion Transistors" Jpn.J.Appl.Phys.37-1・3B. 1110-1115 (1998)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] Eisuke Tokumitsu: "Nonvolatile Memory Operations of Metal-Ferroelectric-Insulator-Semiconductor (MFIS) FET's Using PLZT/STO/Si(100)Structures" IEEE Electron Device Letters. 18・4. 160-162 (1997)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] Hiroshi Ishiwara: "Ferroelectric Neuron Circuits with Adaptive-Learning Function" Computers Elect.Engng. 23・6. 431-438 (1997)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] S.M.Yoon, E.Tokumitsu, and H.Ishiwara: "Adaptrive-Learning Neuron Integrated Circuits Using Metal-Ferroelectric (SrBi_2Ta_2O_9) -Semiconductor(MFS)FETs" IEEE Electron Device Letters. 20-5 (to be published). (1998)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] E.Tokumitsu, G.Fujii, and H.Ishiwara: "Electrical Properties of MFS-FETs Using SrBi_2Ta_2O_9 Films directly Grown on Si Substrates by Sol1-Gel Method" Mat.Res.Soc.Symp.Proc.493. 459-464 (1998)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] T.Kamei, E.Tokumitsu, and H.Ishiwara: "Numerical Analysis of Metal-Ferroelectric-Semiconductor Field-Effect-Transistors (MFS-FETs) Considering Inhomogeneous Ferroelectric Polarization" IEICE TRANS.ELECTRON. E81-C-4. 577-582 (1998)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] S.M.Yoon, Y.Kurita, E.Tokumitus, and H.Ishiwara: "Electrical Characteristics of Neuron Oscillation Circuits Composed of MOSFETs and Complementary Unijungtion Transistors" Jpn.J.Appl.Phys.37-3B. 1110-1115 (1998)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] E.Tokumitsu, R.Nakamura, and H.Ishiwara: "Nonvolatile Memory Operations of Metal-Ferroelectric-Insulator-Semiconductor (MFIS) FET's Using PLZT/STO/Si (100) Structures" IEEE Electron Device Letters. 18-4. 160-162 (1997)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] H.Ishiwara, Y.Aoyama, S.Okada, C.Shimamura and E.Tokumitsu: "Ferroelectric Neuron Circuits with Adaptive-Learning Functiones" Computers Elect.Engng. 23-6. 431-438 (1997)

    • Description
      「研究成果報告書概要(欧文)」より

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Published: 1999-12-08  

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