1998 Fiscal Year Final Research Report Summary
Development of Ultra Parallel DSP Processor
| Project/Area Number |
09650439
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| Research Category |
Grant-in-Aid for Scientific Research (C)
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| Allocation Type | Single-year Grants |
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| Section | 一般 |
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| Research Field |
System engineering
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| Research Institution | Tokyo Institute of Technology |
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Principal Investigator |
KUNIEDA Hiroaki Facuity of Engineering, Tokyo Institute of Technology, Professor, 工学部, 教授 (50126273)
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| Co-Investigator(Kenkyū-buntansha) |
LI Dongju Facuity of Engineering, Tokyo Institute of Technology,, 工学部, 教務職員 (20302945)
ISSHIKI Tsuyoshi Facuity of Engineering, Tokyo Institute of Technology, Research Associate, 工学部, 助手 (10281718)
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| Project Period (FY) |
1997 – 1998
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| Keywords | Signal Processing / Image Processing / 3D Graphics / MPEG2 / HDTV / Parallel Processing / Architecture |
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| Research Abstract |
In this project, Architecture and dynamics of parallel processing processor for multimedia system such as Moving Picture Codec and 3D Computer Graphics. In moving picture code, we propose fast new algorithm for detection of moving vectors in HDTV MPEG2. We adopt bit truncations of the image data in the process of pyramid algorithms. The data are trncated according-to the features of the data. The derived algorithm results in better quality with much lower processing time.
We also study the parallel processor architecture for CG graphics. Bit serial processing operations are introduced as to make fast with lower chip areas. We have developed prototype LSI by VDEC systems. We have also developed system compliler, which converts C++ entry into our FPGA configuration data. The system achieves tremendeous. utilization for especially.fast real-time siganl processings.
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