2000 Fiscal Year Final Research Report Summary
Development of nanofabrication technology of metallic p-GaAs and its application to single hole transistors
| Project/Area Number |
10555101
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| Research Category |
Grant-in-Aid for Scientific Research (B).
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| Allocation Type | Single-year Grants |
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| Section | 展開研究 |
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| Research Field |
Electronic materials/Electric materials
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| Research Institution | TOKYO INSTITUTE OF TECHNOLOGY |
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Principal Investigator |
KONAGAI Makoto Graduate School of Sci. and Eng., Tokyo Inst. of Tech. Professor, 大学院・理工学研究科, 教授 (40111653)
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| Co-Investigator(Kenkyū-buntansha) |
TAMOTSU Okamoto Graduate School of Sci. and Eng., Tokyo Inst. of Tech. Research Associate, 大学院・理工学研究科, 助手 (80233378)
YAMADA Akira Graduate School of Sci. and Eng., Tokyo Inst. of Tech. Associate Professor, 大学院・理工学研究科, 助教授 (40220363)
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| Project Period (FY) |
1998 – 2000
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| Keywords | GaAs / III-V compound semiconductors / single hole transistors / nanofabrication / atomic force microscope |
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| Research Abstract |
In this study, AFM-based surface oxidation process was applied for the surface modification of p-type GaAs to fabricate planar-type devices.
A heavily carbon doped p^<++>-GaAs fabricated by metalorganic molecular beam epitaxy (MOMBE) with trimethylgallium (Ga(CH_3)_3 : TMG) and elemental As and a Zn-doped p-GaAs substrate were locally oxidized in air at room temperature using a commercially available AFM unit. The tip of the AFM was Au-coated Si_3N_4 with a pyramidal shape with a base scale of 4μm. A function generator was used for the source of pulsed voltage, and a semiconductor parameter analyzer was also used for the source of constant voltage. All experiments were done by contact mode AFM.
By improving the shape of an AFM tip by electron-beam-induced deposition of a-C using scanning electron microscope (SEM), and by adjusting the AFM oxidation process conditions, a p^<++>-GaAs oxide wire with 10nm width was successfully fabricated. From this result, it was clear that the sizes of p^<++>-GaAs oxide wires could be controlled by adjusting the process conditions.
Moreover, an AFM-based surface oxidation process, including a voltage modulation, was employed in order to improve aspect ratios of p-GaAs oxide. From a duty ratio dependence of aspect ratios of oxide dots, it was considered that optimization of an anodizing time per a cycle of a pulsed voltage was necessary. As a result, we fabricated a p-GaAs groove with 40nm width and 6nm depth at a scanning speed of 60nm/s. From these results, it became clear that pulsed voltage could be employed for the fabrication of oxide with high aspect ratio.
Finally, the obtained oxide wire was successfully applied to semiconductor-insulator-semiconductor (SIS) diode as insulator. From its nonlinear I-V characteristic, it was found that the oxide wire acts as the insulating barrier material for the current.
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