| Co-Investigator(Kenkyū-buntansha) |
KATOH Shigeo Utsunomiya University, 工学部, 教授 (00143529)
OOTSU Kanemitsu Utsunomiya University, 工学部, 助手 (00292574)
YOSHINAGA Tsutomu University of Electro-Communications, 大学院情報システム学研究科(平成12年8月1日宇都宮大学より移動), 助教授 (60210738)
FUKUNAGA Yasushi Hitachi Research Laboratory, 日立研究所・情報制御第一研究部, 部長
KIMURA Yasunori Fujitsu Laboratories, Ltd., マルチメディアシステム研究所・アーキテクチャ研究部, 部長
NAKATA Toshiyuki NEC C&C Media Laboratories, C&Cメディア研究所・高性能コンピューティングテクノロジーグループ, 研究部長
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| Research Abstract |
The A-NET project has designed and implemented a parallel object-oriented language, called A-NETL, and its processing systems. The systems have been implemented on three platforms, such as the A-NETL oriented multicomputer, a workstation cluster, and a commercially available parallel machine, AP1000.
Based on the results of the implementations, this research has designed and evaluated the A-NET multicomputer, using system-on-chip(SOC)technologies. Thus, the research includes the followings : (1)the evaluation of the various A-NETL implementations as the base of the research, (2)the design and evaluation of a multi-threaded, node processor architecture, (3)the design and evaluation of a new adaptive, router architecture, called Recover-x, (4)the SOC multicomputer architecture of the year 2005, and(5)the applications of the A-NETL multicomputer to various areas.
The results of these research indicate that(1)the SOC multicomputer is a promising architecture for future parallel machine, (2)the router should be included in an SOC node, and(3)there is a trade-off point between on-chip DRAM capacity and on-chip cache one.
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