2001 Fiscal Year Final Research Report Summary
Improving Crystal Conditions of Compound Semiconductors Laterally Grown on Metal Wire
| Project/Area Number |
11450006
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| Research Category |
Grant-in-Aid for Scientific Research (B)
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| Allocation Type | Single-year Grants |
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| Section | 一般 |
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| Research Field |
Applied materials science/Crystal engineering
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| Research Institution | Tokyo Institute of Technology |
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Principal Investigator |
MIYAMOTO Yasuyuki Graduate School of Science and Engineering, Tokyo Institute of Technology, Associate Professor, 大学院・理工学研究科, 助教授 (40209953)
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| Project Period (FY) |
1999 – 2001
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| Keywords | Tungsten Wire / Electron Wave / Biprism / Coherent Emitter / Lateral Coherence / OMVPE Embedding Tungsten / Attractive Potential / Double Barrier Resonant Emitter |
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| Research Abstract |
Fabrication of Tungsten Wire with Low Resistance and High Aspect Ratio
To improve electrical performance of Tungsten wire, a Tungsten film with a conductivity of about six times higher than that in bulk has been achieved by sputtering evaporation. A wire width of 100 nm and an aspect ratio of about 1 have been also achieved by a combination of the electron beam exposure and the reactive ion etching (RIE).
Crystal Growth to Bury Tungsten Wire by MOVPE and Its Crystalline Estimation by HBT
Dependences of lateral growth of GaAs and InP to bury Tungsten wire on gas sources and growth conditions have been revealed. Crystal conditions close to buried metal surface have been also revealed to be acceptable since sufficient current gains of heterojunction bipolar transistors fabricated on the buried metal have been obtained. Moreover, electric conditions close at the interface between InP and buried metal wire has been estimated by means of high-frequency characteristics of sub-micron size transis
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tor. As a result, the electric conditions close at the interface have depended on temperature at crystal growth to bury Tungsten wire. It is reasonable to consider there have been generated carriers from impurities diffusing from Tungsten wire and the carrier density can be considered to be reduced by improving a purity of Tungsten wire and lowering a temperature at crystal growth to bury Tungsten wire.
Fabrication of a Novel Transistor with a Metal Wire Gate
We have fabricated a novel transistor where hot electrons are generated and travel through undoped semiconductor region by adopting a combination of double-barrier resonant-tunneling structure and buried metal gate. A reduction of emitter-gate leakage current has been achieved by using a semi-insulating substrate and wiring the buried metal and contact pad through a free-standing wire realized by etching semiconductor. From measured I-V characteristics, it has been confirmed there has been realized attractive potential around the buried metallic gate and we have been able to show the potential of our device. Less
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Research Products
(26 results)
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[Publications] L.-E. Wernersson, R. Yamamoto, E. Lind, I. Pietzonka, W. Seifert, Y. Miyamoto, K. Furuya, and L. Samuelson: "Attractive Potential around a Buried Metallic Gate in a Schottky Collector Hot Electron Transistor"28th International Symposium on Compound Semiconductors 200 (ISCS2001), MoP-33, Tokyo, JAPAN. (2001)
Description
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