2001 Fiscal Year Final Research Report Summary
Fabrication of Functional Heteroepitaxial Layers Embedding Devices
| Project/Area Number |
11450011
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| Research Category |
Grant-in-Aid for Scientific Research (B)
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| Allocation Type | Single-year Grants |
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| Section | 一般 |
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| Research Field |
Applied materials science/Crystal engineering
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| Research Institution | Toyohashi University of Technology |
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Principal Investigator |
YONEZU Hiroo Toyohashi University of Technology, Faculty of Engineering, Professor, 工学部, 教授 (90191668)
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| Co-Investigator(Kenkyū-buntansha) |
OHSHIMA Naoki Yamaguchi University, Faculty of Engineering, Lecturer, 工学部, 講師 (70252319)
FURUKAWA Yuzo Toyohashi University of Technology, Faculty of Engineering, Research Associate, 工学部, 助手 (20324486)
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| Project Period (FY) |
1999 – 2001
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| Keywords | hetero-epitaxy / lattice-mismatch / lattice-matching / dislocation-free / III-V-N compound semiconductor / GaPN / GaAsPN / GaAs-on-Si |
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| Research Abstract |
III-V compound semiconductors were utilized for optoelectronic devices such as laser diodes and others and microwave devices such as high electron mobility transistors and others. They are key materials for communication and information terminals. On the other hand, a silicon (Si) semiconductor of a Ivth element has been widely used as LSIs for electronic systems including computers. If both semiconductors are combined as a single chip, novel devices could be developed.
When the III-V compound semiconductor is grown on the Si substrate, a large number of crystalline defects, specifically dislocations were generated in spite of many researches. It is caused by the difference in the number of valence electrons, the large difference in lattice constants and of thermal expansion coefficients. Then, novel devices have not been developed. In this research work, we tried to grow dislocation-free III-V compound semiconductors on Si substrates by focusing on the mismatch of lattice constants and
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of thermal expansion coefficients since the problem caused by the difference of the number of valence electrons has been solved by us. Lattice matching was tried by growing III-V-N compound semiconductors of GaPN and GaAsPN on the Si substrate. A Si capping layer was expected to suppress the thermal strain introduced at a cooling stage after growth due to the difference in thermal expansion coefficients. As a result, the dislocation -free III-V-N layers were successfully grown on the Si substrate for the first time. Neither threading dislocations nor misfit dislocations were observed even at hetero-interfaces. A dislocation-free GaAsPN/GaPN quantum well structure and Si/GaPN/Si structure were also grown. The Si/GaPN/Si structure is a symbolic structure for novel optoelectronic integrated circuits. The GaPN layer can be replaced with a layer for optical or microwave device and the Si capping layer is utilized for LSIs. Thus, a basic technology was developed for novel optoelectronic integrated circuits.
In order to expand the capability of device design, the increase of nitrogen contents is needed. High nitrogen contents of 7-10 % were achieved by low temperature growth under atomic hydrogen irradiation. Less
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